qemu/target
Helge Deller 4a4554c6c5 hppa: Add support for an emulated TOC/NMI button.
Almost all PA-RISC machines have either a button that is labeled with 'TOC' or
a BMC/GSP function to trigger a TOC.  TOC is a non-maskable interrupt that is
sent to the processor.  This can be used for diagnostic purposes like obtaining
a stack trace/register dump or to enter KDB/KGDB in Linux.

This patch adds support for such an emulated TOC button.

It wires up the qemu monitor "nmi" command to trigger a TOC.  For that it
provides the hppa_nmi function which is assigned to the nmi_monitor_handler
function pointer.  When called it raises the EXCP_TOC hardware interrupt in the
hppa_cpu_do_interrupt() function.  The interrupt function then calls the
architecturally defined TOC function in SeaBIOS-hppa firmware (at fixed address
0xf0000000).

According to the PA-RISC PDC specification, the SeaBIOS firmware then writes
the CPU registers into PIM (processor internal memmory) for later analysis.  In
order to write all registers it needs to know the contents of the CPU "shadow
registers" and the IASQ- and IAOQ-back values. The IAOQ/IASQ values are
provided by qemu in shadow registers when entering the SeaBIOS TOC function.
This patch adds a new aritificial opcode "getshadowregs" (0xfffdead2) which
restores the original values of the shadow registers. With this opcode SeaBIOS
can store those registers as well into PIM before calling an OS-provided TOC
handler.

To trigger a TOC, switch to the qemu monitor with Ctrl-A C, and type in the
command "nmi".  After the TOC started the OS-debugger, exit the qemu monitor
with Ctrl-A C.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-02 18:46:42 +01:00
..
alpha exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
arm exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
avr target/avr: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
cris exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
hexagon target/hexagon/cpu.h: don't include qemu-common.h 2021-12-15 10:35:26 +00:00
hppa hppa: Add support for an emulated TOC/NMI button. 2022-02-02 18:46:42 +01:00
i386 exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
m68k target/m68k: don't word align SP in stack frame if M68K_FEATURE_UNALIGNED_DATA feature enabled 2022-01-09 12:05:02 +01:00
microblaze target/microblaze: Do not set MO_ALIGN for user-only 2021-11-02 07:00:52 -04:00
mips target/mips: Extract trap code into env->error_code 2022-01-11 18:40:44 +01:00
nios2 linux-user/nios2: Map a real kuser page 2022-01-06 11:40:52 +01:00
openrisc target/openrisc: Make openrisc_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
ppc exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
riscv target/riscv: Implement the stval/mtval illegal instruction 2022-01-08 15:46:10 +10:00
rx target/rx/cpu.h: Don't include qemu-common.h 2021-12-15 10:35:26 +00:00
s390x exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
sh4 exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
sparc exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
tricore exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
xtensa exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00