Bin Meng d43d54ca2b hw/riscv: Skip re-generating DT nodes for a given DTB ... Launch qemu-system-riscv64 with a given dtb for 'sifive_u' and 'virt' machines, QEMU complains: qemu_fdt_add_subnode: Failed to create subnode /soc: FDT_ERR_EXISTS The whole DT generation logic should be skipped when a given DTB is present. Fixes: b1f19f238c ("hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20230228074522.1845007-1-bmeng@tinylab.org> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-03-01 17:19:13 -08:00
..
boot.c	hw/riscv/boot.c: make riscv_load_initrd() static	2023-02-16 07:55:37 -08:00
Kconfig	hw/riscv: Sort machines Kconfig options in alphabetical order	2023-01-06 10:42:55 +10:00
meson.build	hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines	2021-07-20 15:32:49 +02:00
microchip_pfsoc.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
numa.c	hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()	2023-01-20 10:14:14 +10:00
opentitan.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
riscv_hart.c	hw/riscv: hart: Add a new 'resetvec' property	2020-09-09 15:54:18 -07:00
shakti_c.c	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
sifive_e.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
sifive_u.c	hw/riscv: Skip re-generating DT nodes for a given DTB	2023-03-01 17:19:13 -08:00
spike.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
virt.c	hw/riscv: Skip re-generating DT nodes for a given DTB	2023-03-01 17:19:13 -08:00