qemu/target-arm
Peter Maydell d3cb6e2b06 target-arm: Fix errors in decode of M profile CPS
Fix errors in the decode of M profile CPS:
 * the decode of the I (affects PRIMASK) and F (affects FAULTMASK)
   bits was reversed
 * the FAULTMASK system register number is 19, not 17

This fixes an issue reported as LP:913925.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-13 17:25:08 +00:00
..
cpu.h arm: add dummy A9-specific cp15 registers 2012-01-05 15:49:06 +00:00
helper.c arm: add dummy A9-specific cp15 registers 2012-01-05 15:49:06 +00:00
helper.h target-arm: Implement VFPv4 fused multiply-accumulate insns 2011-10-19 16:14:07 +00:00
iwmmxt_helper.c Revert "target-arm: Use global env in iwmmxt_helper.c helpers" 2011-06-22 15:01:21 +00:00
machine.c arm: add dummy A9-specific cp15 registers 2012-01-05 15:49:06 +00:00
neon_helper.c Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c ARM: fix segfault 2011-10-08 10:00:02 +00:00
translate.c target-arm: Fix errors in decode of M profile CPS 2012-01-13 17:25:08 +00:00