qemu/target
Peter Maydell d33abe82c7 target/arm: Implement dummy versions of M-profile FP-related registers
The M-profile floating point support has three associated config
registers: FPCAR, FPCCR and FPDSCR. It also makes the registers
CPACR and NSACR have behaviour other than reads-as-zero.
Add support for all of these as simple reads-as-written registers.
We will hook up actual functionality later.

The main complexity here is handling the FPCCR register, which
has a mix of banked and unbanked bits.

Note that we don't share storage with the A-profile
cpu->cp15.nsacr and cpu->cp15.cpacr_el1, though the behaviour
is quite similar, for two reasons:
 * the M profile CPACR is banked between security states
 * it preserves the invariant that M profile uses no state
   inside the cp15 substruct

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190416125744.27770-4-peter.maydell@linaro.org
2019-04-29 17:35:58 +01:00
..
alpha tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
arm target/arm: Implement dummy versions of M-profile FP-related registers 2019-04-29 17:35:58 +01:00
cris tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
hppa tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
i386 Add tcg_gen_extract2_*. 2019-04-28 11:43:10 +01:00
lm32 tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
m68k tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
microblaze tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
mips tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
moxie tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
nios2 Add Nios II semihosting support. 2019-04-29 16:09:51 +01:00
openrisc tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
ppc Add tcg_gen_extract2_*. 2019-04-28 11:43:10 +01:00
riscv tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
s390x Add tcg_gen_extract2_*. 2019-04-28 11:43:10 +01:00
sh4 tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
sparc tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
tilegx tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
tricore tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
unicore32 tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
xtensa tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00