qemu/include/hw/net
Jamin Lin 578c6e9ed5 hw/net:ftgmac100: introduce TX and RX ring base address high registers to support 64 bits
ASPEED AST2700 SOC is a 64 bits quad core CPUs (Cortex-a35)
And the base address of dram is "0x4 00000000" which
is 64bits address.

It have "Normal Priority Transmit Ring Base Address Register High(0x17C)",
"High Priority Transmit Ring Base Address Register High(0x184)" and
"Receive Ring Base Address Register High(0x18C)" to save the high part physical
address of descriptor manager.
Ex: TX descriptor manager address [34:0]
The "Normal Priority Transmit Ring Base Address Register High(0x17C)"
bits [2:0] which corresponds the bits [34:32] of the 64 bits address of
the TX ring buffer address.
The "Normal Priority Transmit Ring Base Address Register(0x20)" bits [31:0]
which corresponds the bits [31:0] of the 64 bits address
of the TX ring buffer address.

Introduce a new sub region which size is 0x100 for the set of new registers
and map it at 0x100 in the container region.
This sub region range is from 0x100 to 0x1ff.

Introduce a new property and object attribute to activate the region for new registers.
Introduce a new memop handlers for the new register read and write.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
2024-07-09 08:05:44 +02:00
..
allwinner_emac.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
allwinner-sun8i-emac.h Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
cadence_gem.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
dp8393x.h hw/net/dp8393x.c: move TYPE_DP8393X and dp8393xState into dp8393x.h 2023-06-22 09:25:40 +02:00
ftgmac100.h hw/net:ftgmac100: introduce TX and RX ring base address high registers to support 64 bits 2024-07-09 08:05:44 +02:00
imx_fec.h hw/net/imx_fec: Support two Ethernet interfaces connected to single MDIO bus 2023-04-20 10:25:43 +01:00
lan9118.h hw/net/lan9118: use qemu_configure_nic_device() 2024-02-02 16:23:47 +00:00
lance.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
lasi_82596.h hw/net/lasi_i82596: use qemu_create_nic_device() 2024-02-02 16:23:47 +00:00
mii.h include/: spelling fixes 2023-09-08 13:08:52 +03:00
msf2-emac.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
mv88w8618_eth.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
ne2000-isa.h hw/i386/pc: use qemu_get_nic_info() and pci_init_nic_devices() 2024-02-02 16:23:47 +00:00
npcm7xx_emc.h hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() 2023-01-12 17:15:09 +00:00
npcm_gmac.h hw/net/npcm_gmac.h: correct typos 2024-02-21 08:16:43 +03:00
smc91c111.h hw/net/smc91c111: use qemu_configure_nic_device() 2024-02-02 16:23:47 +00:00
xlnx-versal-canfd.h hw/net/can: Introduce Xilinx Versal CANFD controller 2023-06-06 10:19:30 +01:00
xlnx-zynqmp-can.h include: Include headers where needed 2023-01-08 01:54:22 -05:00