qemu/target
Rajnesh Kanwal c5969a3a3c
target/riscv: Fix VS mode interrupts forwarding.
Currently riscv_cpu_local_irq_pending is used to find out pending
interrupt and VS mode interrupts are being shifted to represent
S mode interrupts in this function. So when the cause returned by
this function is passed to riscv_cpu_do_interrupt to actually
forward the interrupt, the VS mode forwarding check does not work
as intended and interrupt is actually forwarded to hypervisor. This
patch fixes this issue.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-16 17:03:51 -07:00
..
alpha
arm target/arm: kvm: Inject events at the last stage of sync 2020-03-12 16:31:10 +00:00
cris
hppa
i386 Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEAD 2020-02-25 13:41:48 +01:00
lm32
m68k
microblaze
mips
moxie
nios2
openrisc
ppc target/ppc/cpu.h: Clean up comments in the struct CPUPPCState definition 2020-02-21 09:15:04 +11:00
riscv target/riscv: Fix VS mode interrupts forwarding. 2020-03-16 17:03:51 -07:00
s390x s390x: ipl: Consolidate iplb validity check into one function 2020-03-10 10:18:20 +01:00
sh4
sparc
tilegx
tricore
unicore32
xtensa