Shiju Jose d1853190db hw/cxl/cxl-mailbox-utils: Fix for device DDR5 ECS control feature tables ... CXL spec 3.1 section 8.2.9.9.11.2 describes the DDR5 Error Check Scrub (ECS) control feature. ECS log capabilities field in following ECS tables, which is common for all memory media FRUs in a CXL device. Fix struct CXLMemECSReadAttrs and struct CXLMemECSWriteAttrs to make log entry type field common. Fixes: 2d41ce38fb ("hw/cxl/cxl-mailbox-utils: Add device DDR5 ECS control feature") Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241014121902.2146424-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2024-11-04 16:03:24 -05:00
..
cxl-cdat.c	hw/cxl/cxl-cdat: Make cxl_doe_cdat_init() return boolean	2024-04-25 12:48:12 +02:00
cxl-component-utils.c	hw/pci-bridge/pxb-cxl: Drop RAS capability from host bridge.	2024-03-12 17:56:55 -04:00
cxl-device-utils.c	hw/cxl: Standardize all references on CXL r3.1 and minor updates	2024-02-14 06:09:33 -05:00
cxl-events.c	hw/cxl/events: discard all event records during sanitation	2024-07-21 14:31:59 -04:00
cxl-host-stubs.c	pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.	2022-06-09 19:32:49 -04:00
cxl-host.c	hw/cxl/cxl-host: Fix segmentation fault when getting cxl-fmw property	2024-07-21 14:31:59 -04:00
cxl-mailbox-utils.c	hw/cxl/cxl-mailbox-utils: Fix for device DDR5 ECS control feature tables	2024-11-04 16:03:24 -05:00
Kconfig
meson.build	meson: remove CONFIG_ALL	2023-12-31 09:11:28 +01:00
switch-mailbox-cci.c	hw: Use device_class_set_legacy_reset() instead of opencoding	2024-09-13 15:31:44 +01:00