qemu/tcg/ppc
Richard Henderson ce8e5f2f2f tcg/ppc: Optimize cmpsel with constant 0/-1 arguments
These can be simplified to and/or/andc/orc,
avoiding the load of the constantinto a register.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-09-22 06:54:50 +02:00
..
tcg-target-con-set.h tcg/ppc: Optimize cmpsel with constant 0/-1 arguments 2024-09-22 06:54:50 +02:00
tcg-target-con-str.h tcg/ppc: Add TCG_CT_CONST_CMP 2024-02-03 23:53:49 +00:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg/ppc: Optimize cmpsel with constant 0/-1 arguments 2024-09-22 06:54:50 +02:00
tcg-target.h tcg/ppc: Implement cmpsel_vec 2024-09-22 06:54:50 +02:00
tcg-target.opc.h tcg/ppc: Implement INDEX_op_rot[lr]v_vec 2020-06-02 08:42:37 -07:00