27d405301a
Up until now, the EXTI implementation had 16 inbound GPIOs connected to the 16 outbound GPIOs of STM32L4x5 SYSCFG. The EXTI actually handles 40 lines (namely 5 from STM32L4x5 USART devices which are already implemented in QEMU). In order to connect USART devices to EXTI, this commit consolidates constants `EXTI_NUM_INTERRUPT_OUT_LINES` (40) and `EXTI_NUM_GPIO_EVENT_IN_LINES` (16) into `EXTI_NUM_LINES` (40). Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240707085927.122867-2-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
54 lines
1.5 KiB
C
54 lines
1.5 KiB
C
/*
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* STM32L4x5 EXTI (Extended interrupts and events controller)
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*
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* Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr>
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* Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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* This work is based on the stm32f4xx_exti by Alistair Francis.
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* Original code is licensed under the MIT License:
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*/
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/*
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* The reference used is the STMicroElectronics RM0351 Reference manual
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* for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs.
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* https://www.st.com/en/microcontrollers-microprocessors/stm32l4x5/documentation.html
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*/
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#ifndef HW_STM32L4X5_EXTI_H
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#define HW_STM32L4X5_EXTI_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_STM32L4X5_EXTI "stm32l4x5-exti"
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OBJECT_DECLARE_SIMPLE_TYPE(Stm32l4x5ExtiState, STM32L4X5_EXTI)
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#define EXTI_NUM_LINES 40
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#define EXTI_NUM_REGISTER 2
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struct Stm32l4x5ExtiState {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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uint32_t imr[EXTI_NUM_REGISTER];
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uint32_t emr[EXTI_NUM_REGISTER];
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uint32_t rtsr[EXTI_NUM_REGISTER];
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uint32_t ftsr[EXTI_NUM_REGISTER];
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uint32_t swier[EXTI_NUM_REGISTER];
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uint32_t pr[EXTI_NUM_REGISTER];
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/* used for edge detection */
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uint32_t irq_levels[EXTI_NUM_REGISTER];
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qemu_irq irq[EXTI_NUM_LINES];
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};
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#endif
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