6f9c3aaa34
Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> Message-id: 20231216133408.2884-1-n.ostrenkov@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
42 lines
898 B
C
42 lines
898 B
C
/*
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* Copyright (c) 2017, Impinj, Inc.
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*
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* i.MX7 SNVS block emulation code
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*
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* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef IMX7_SNVS_H
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#define IMX7_SNVS_H
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#include "qemu/bitops.h"
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#include "hw/sysbus.h"
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#include "qom/object.h"
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enum IMX7SNVSRegisters {
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SNVS_LPCR = 0x38,
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SNVS_LPCR_TOP = BIT(6),
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SNVS_LPCR_DP_EN = BIT(5),
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SNVS_LPSRTCMR = 0x050, /* Secure Real Time Counter MSB Register */
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SNVS_LPSRTCLR = 0x054, /* Secure Real Time Counter LSB Register */
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};
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#define TYPE_IMX7_SNVS "imx7.snvs"
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OBJECT_DECLARE_SIMPLE_TYPE(IMX7SNVSState, IMX7_SNVS)
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struct IMX7SNVSState {
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/* <private> */
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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uint64_t tick_offset;
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uint64_t lpcr;
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};
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#endif /* IMX7_SNVS_H */
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