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Peter Maydell 6894576347 Implement parameter fields. 
Push warning pragmas into the generated code.
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Merge remote-tracking branch 'remotes/rth/tags/pull-dt-20190819' into staging

Implement parameter fields.
Push warning pragmas into the generated code.

# gpg: Signature made Mon 19 Aug 2019 16:14:41 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-dt-20190819:
  target/riscv: Remove redundant declaration pragmas
  decodetree: Suppress redundant declaration warnings
  decodetree: Allow !function with no input bits

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-08-19 16:55:30 +01:00
..
insn_trans
RISC-V: Clear load reservations on context switch and SC
2019-06-25 22:37:04 -07:00
cpu_bits.h
target/riscv: Add the mcountinhibit CSR
2019-06-25 03:05:40 -07:00
cpu_helper.c
RISC-V: Clear load reservations on context switch and SC
2019-06-25 22:37:04 -07:00
cpu_user.h
Supply missing header guards
2019-06-12 13:20:21 +02:00
cpu-param.h
tcg: Split out target/arch/cpu-param.h
2019-06-10 07:03:34 -07:00
cpu.c
target/riscv: rationalise softfloat includes
2019-08-19 12:07:13 +01:00
cpu.h
target/riscv: rationalise softfloat includes
2019-08-19 12:07:13 +01:00
csr.c
RISC-V: Add support for the Zicsr extension
2019-06-25 22:32:42 -07:00
fpu_helper.c
target/riscv: rationalise softfloat includes
2019-08-19 12:07:13 +01:00
gdbstub.c
Include qemu-common.h exactly where needed
2019-06-12 13:20:20 +02:00
helper.h
…
insn16-32.decode
target/riscv: Split RVC32 and RVC64 insns into separate files
2019-05-24 12:09:22 -07:00
insn16-64.decode
target/riscv: Add checks for several RVC reserved operands
2019-05-24 12:09:25 -07:00
insn16.decode
target/riscv: Add checks for several RVC reserved operands
2019-05-24 12:09:25 -07:00
insn32-64.decode
…
insn32.decode
target/riscv: Name the argument sets for all of insn32 formats
2019-05-24 12:09:22 -07:00
instmap.h
Supply missing header guards
2019-06-12 13:20:21 +02:00
Makefile.objs
target/riscv: Split RVC32 and RVC64 insns into separate files
2019-05-24 12:09:22 -07:00
op_helper.c
target/riscv: Use env_cpu, env_archcpu
2019-06-10 07:03:42 -07:00
pmp.c
RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off
2019-06-23 23:44:42 -07:00
pmp.h
RISC-V: Check for the effective memory privilege mode during PMP checks
2019-06-23 23:44:41 -07:00
trace-events
RISC-V: Convert trap debugging to trace events
2019-03-19 05:14:40 -07:00
translate.c
target/riscv: Remove redundant declaration pragmas
2019-08-19 08:13:14 -07:00