cf0386509e
32-bit x86 systems do not have a reserved memory for hole64. On those 32-bit
systems without PSE36 or PAE CPU features, hotplugging memory devices are not
supported by QEMU as QEMU always places hotplugged memory above 4 GiB boundary
which is beyond the physical address space of the processor. Linux guests also
does not support memory hotplug on those systems. Please see Linux
kernel commit b59d02ed08690 ("mm/memory_hotplug: disable the functionality
for 32b") for more details.
Therefore, the maximum limit of the guest physical address in the absence of
additional memory devices effectively coincides with the end of
"above 4G memory space" region for 32-bit x86 without PAE/PSE36. When users
configure additional memory devices, after properly accounting for the
additional device memory region to find the maximum value of the guest
physical address, the address will be outside the range of the processor's
physical address space.
This change adds improvements to take above into consideration.
For example, previously this was allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
With this change now it is no longer allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
qemu-system-x86_64: Address space limit 0xffffffff < 0x2bfffffff phys-bits too low (32)
However, the following are allowed since on both cases physical address
space of the processor is 36 bits:
$ ./qemu-system-x86_64 -cpu pentium2 -m size=10G
$ ./qemu-system-x86_64 -cpu pentium,pse36=on -m size=10G
For 32-bit, without PAE/PSE36, hotplugging additional memory is no longer allowed.
$ ./qemu-system-i386 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too low (32)
$ ./qemu-system-i386 -machine q35 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too low (32)
A new compatibility flag is introduced to make sure pc_max_used_gpa() keeps
returning the old value for machines 8.1 and older.
Therefore, the above is still allowed for older machine types in order to support
compatibility. Hence, the following still works:
$ ./qemu-system-i386 -machine pc-i440fx-8.1 -m size=1G,maxmem=3G,slots=2
$ ./qemu-system-i386 -machine pc-q35-8.1 -m size=1G,maxmem=3G,slots=2
Further, following is also allowed as with PSE36, the processor has 36-bit
address space:
$ ./qemu-system-i386 -cpu 486,pse36=on -m size=1G,maxmem=3G,slots=2
After calling CPUID with EAX=0x80000001, all AMD64 compliant processors
have the longmode-capable-bit turned on in the extended feature flags (bit 29)
in EDX. The absence of CPUID longmode can be used to differentiate between
32-bit and 64-bit processors and is the recommended approach. QEMU takes this
approach elsewhere (for example, please see x86_cpu_realizefn()), With
this change, pc_max_used_gpa() also uses the same method to detect 32-bit
processors.
Unit tests are modified to not run 32-bit x86 tests that use memory hotplug.
Suggested-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230922160413.165702-1-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
330 lines
9.3 KiB
C
330 lines
9.3 KiB
C
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu/notify.h"
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#include "qapi/qapi-types-common.h"
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#include "qemu/uuid.h"
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#include "hw/boards.h"
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#include "hw/block/fdc.h"
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#include "hw/block/flash.h"
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#include "hw/i386/x86.h"
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#include "hw/hotplug.h"
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#include "qom/object.h"
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#include "hw/i386/sgx-epc.h"
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#include "hw/firmware/smbios.h"
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#include "hw/cxl/cxl.h"
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#define HPET_INTCAP "hpet-intcap"
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/**
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* PCMachineState:
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* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
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* @boot_cpus: number of present VCPUs
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*/
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typedef struct PCMachineState {
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/*< private >*/
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X86MachineState parent_obj;
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/* <public> */
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/* State for other subsystems/APIs: */
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Notifier machine_done;
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/* Pointers to devices and objects: */
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PCIBus *bus;
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I2CBus *smbus;
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PFlashCFI01 *flash[2];
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ISADevice *pcspk;
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DeviceState *iommu;
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/* Configuration options: */
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uint64_t max_ram_below_4g;
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OnOffAuto vmport;
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SmbiosEntryPointType smbios_entry_point_type;
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bool acpi_build_enabled;
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bool smbus_enabled;
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bool sata_enabled;
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bool hpet_enabled;
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bool i8042_enabled;
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bool default_bus_bypass_iommu;
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uint64_t max_fw_size;
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/* ACPI Memory hotplug IO base address */
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hwaddr memhp_io_base;
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SGXEPCState sgx_epc;
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CXLState cxl_devices_state;
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} PCMachineState;
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#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
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#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
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#define PC_MACHINE_VMPORT "vmport"
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#define PC_MACHINE_SMBUS "smbus"
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#define PC_MACHINE_SATA "sata"
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#define PC_MACHINE_I8042 "i8042"
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#define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
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#define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type"
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/**
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* PCMachineClass:
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*
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* Compat fields:
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*
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* @enforce_aligned_dimm: check that DIMM's address/size is aligned by
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* backend's alignment value if provided
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* @acpi_data_size: Size of the chunk of memory at the top of RAM
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* for the BIOS ACPI tables and other BIOS
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* datastructures.
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* @gigabyte_align: Make sure that guest addresses aligned at
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* 1Gbyte boundaries get mapped to host
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* addresses aligned at 1Gbyte boundaries. This
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* way we can use 1GByte pages in the host.
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*
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*/
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struct PCMachineClass {
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/*< private >*/
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X86MachineClass parent_class;
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/*< public >*/
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/* Device configuration: */
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bool pci_enabled;
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bool kvmclock_enabled;
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/* Compat options: */
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/* Default CPU model version. See x86_cpu_set_default_version(). */
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int default_cpu_version;
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/* ACPI compat: */
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bool has_acpi_build;
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bool rsdp_in_ram;
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int legacy_acpi_table_size;
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unsigned acpi_data_size;
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int pci_root_uid;
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/* SMBIOS compat: */
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bool smbios_defaults;
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bool smbios_legacy_mode;
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bool smbios_uuid_encoded;
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SmbiosEntryPointType default_smbios_ep_type;
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/* RAM / address space compat: */
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bool gigabyte_align;
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bool has_reserved_memory;
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bool enforce_aligned_dimm;
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bool broken_reserved_end;
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bool enforce_amd_1tb_hole;
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/* generate legacy CPU hotplug AML */
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bool legacy_cpu_hotplug;
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/* use PVH to load kernels that support this feature */
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bool pvh_enabled;
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/* create kvmclock device even when KVM PV features are not exposed */
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bool kvmclock_create_always;
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/* resizable acpi blob compat */
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bool resizable_acpi_blob;
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/*
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* whether the machine type implements broken 32-bit address space bound
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* check for memory.
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*/
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bool broken_32bit_mem_addr_check;
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};
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#define TYPE_PC_MACHINE "generic-pc-machine"
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OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
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/* ioapic.c */
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GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
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/* pc.c */
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extern int fd_bootchk;
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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void pc_guest_info_init(PCMachineState *pcms);
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#define PCI_HOST_PROP_RAM_MEM "ram-mem"
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#define PCI_HOST_PROP_PCI_MEM "pci-mem"
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#define PCI_HOST_PROP_SYSTEM_MEM "system-mem"
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#define PCI_HOST_PROP_IO_MEM "io-mem"
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#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
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#define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
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#define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
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void pc_pci_as_mapping_init(MemoryRegion *system_memory,
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MemoryRegion *pci_address_space);
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void xen_load_linux(PCMachineState *pcms);
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void pc_memory_init(PCMachineState *pcms,
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MemoryRegion *system_memory,
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MemoryRegion *rom_memory,
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uint64_t pci_hole64_size);
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uint64_t pc_pci_hole64_start(void);
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DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(struct PCMachineState *pcms,
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ISABus *isa_bus, qemu_irq *gsi,
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ISADevice *rtc_state,
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bool create_fdctrl,
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uint32_t hpet_irqs);
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void pc_cmos_init(PCMachineState *pcms,
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BusState *ide0, BusState *ide1,
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ISADevice *s);
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void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
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void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
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/* port92.c */
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#define PORT92_A20_LINE "a20"
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#define TYPE_PORT92 "port92"
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/* pc_sysfw.c */
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void pc_system_flash_create(PCMachineState *pcms);
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void pc_system_flash_cleanup_unused(PCMachineState *pcms);
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void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
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bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
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int *data_len);
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void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
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/* hw/i386/acpi-common.c */
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void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
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GArray *entry, bool force_enabled);
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/* sgx.c */
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void pc_machine_init_sgx_epc(PCMachineState *pcms);
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extern GlobalProperty pc_compat_8_1[];
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extern const size_t pc_compat_8_1_len;
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extern GlobalProperty pc_compat_8_0[];
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extern const size_t pc_compat_8_0_len;
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extern GlobalProperty pc_compat_7_2[];
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extern const size_t pc_compat_7_2_len;
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extern GlobalProperty pc_compat_7_1[];
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extern const size_t pc_compat_7_1_len;
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extern GlobalProperty pc_compat_7_0[];
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extern const size_t pc_compat_7_0_len;
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extern GlobalProperty pc_compat_6_2[];
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extern const size_t pc_compat_6_2_len;
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extern GlobalProperty pc_compat_6_1[];
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extern const size_t pc_compat_6_1_len;
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extern GlobalProperty pc_compat_6_0[];
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extern const size_t pc_compat_6_0_len;
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extern GlobalProperty pc_compat_5_2[];
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extern const size_t pc_compat_5_2_len;
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extern GlobalProperty pc_compat_5_1[];
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extern const size_t pc_compat_5_1_len;
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extern GlobalProperty pc_compat_5_0[];
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extern const size_t pc_compat_5_0_len;
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extern GlobalProperty pc_compat_4_2[];
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extern const size_t pc_compat_4_2_len;
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extern GlobalProperty pc_compat_4_1[];
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extern const size_t pc_compat_4_1_len;
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extern GlobalProperty pc_compat_4_0[];
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extern const size_t pc_compat_4_0_len;
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extern GlobalProperty pc_compat_3_1[];
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extern const size_t pc_compat_3_1_len;
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extern GlobalProperty pc_compat_3_0[];
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extern const size_t pc_compat_3_0_len;
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extern GlobalProperty pc_compat_2_12[];
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extern const size_t pc_compat_2_12_len;
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extern GlobalProperty pc_compat_2_11[];
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extern const size_t pc_compat_2_11_len;
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extern GlobalProperty pc_compat_2_10[];
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extern const size_t pc_compat_2_10_len;
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extern GlobalProperty pc_compat_2_9[];
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extern const size_t pc_compat_2_9_len;
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extern GlobalProperty pc_compat_2_8[];
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extern const size_t pc_compat_2_8_len;
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extern GlobalProperty pc_compat_2_7[];
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extern const size_t pc_compat_2_7_len;
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extern GlobalProperty pc_compat_2_6[];
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extern const size_t pc_compat_2_6_len;
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extern GlobalProperty pc_compat_2_5[];
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extern const size_t pc_compat_2_5_len;
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extern GlobalProperty pc_compat_2_4[];
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extern const size_t pc_compat_2_4_len;
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extern GlobalProperty pc_compat_2_3[];
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extern const size_t pc_compat_2_3_len;
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extern GlobalProperty pc_compat_2_2[];
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extern const size_t pc_compat_2_2_len;
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extern GlobalProperty pc_compat_2_1[];
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extern const size_t pc_compat_2_1_len;
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extern GlobalProperty pc_compat_2_0[];
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extern const size_t pc_compat_2_0_len;
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extern GlobalProperty pc_compat_1_7[];
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extern const size_t pc_compat_1_7_len;
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extern GlobalProperty pc_compat_1_6[];
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extern const size_t pc_compat_1_6_len;
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extern GlobalProperty pc_compat_1_5[];
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extern const size_t pc_compat_1_5_len;
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extern GlobalProperty pc_compat_1_4[];
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extern const size_t pc_compat_1_4_len;
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int pc_machine_kvm_type(MachineState *machine, const char *vm_type);
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#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
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static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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optsfn(mc); \
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mc->init = initfn; \
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mc->kvm_type = pc_machine_kvm_type; \
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} \
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static const TypeInfo pc_machine_type_##suffix = { \
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.name = namestr TYPE_MACHINE_SUFFIX, \
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.parent = TYPE_PC_MACHINE, \
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.class_init = pc_machine_##suffix##_class_init, \
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}; \
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static void pc_machine_init_##suffix(void) \
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{ \
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type_register(&pc_machine_type_##suffix); \
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} \
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type_init(pc_machine_init_##suffix)
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#endif
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