qemu/target
James Hogan cec56a733d target/mips: Add segmentation control registers
The optional segmentation control registers CP0_SegCtl0, CP0_SegCtl1 &
CP0_SegCtl2 control the behaviour and required privilege of the legacy
virtual memory segments.

Add them to the CP0 interface so they can be read and written when
CP0_Config3.SC=1, and initialise them to describe the standard legacy
layout so they can be used in future patches regardless of whether they
are exposed to the guest.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Yongbok Kim <yongbok.kim@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
2017-07-20 22:42:26 +01:00
..
alpha tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
arm tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
cris tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
hppa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
i386 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
lm32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
m68k tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
microblaze tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
mips target/mips: Add segmentation control registers 2017-07-20 22:42:26 +01:00
moxie tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
nios2 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
openrisc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
ppc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
s390x tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sh4 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sparc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tilegx tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tricore tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
unicore32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
xtensa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00