Leon Alrae ce9782f40a target-mips: add ERETNC instruction and Config5.LLB bit ... ERETNC is identical to ERET except that an ERETNC will not clear the LLbit that is set by execution of an LL instruction, and thus when placed between an LL and SC sequence, will never cause the SC to fail. Presence of ERETNC is denoted by the Config5.LLB. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>		2015-06-11 10:13:29 +01:00
..
cpu-qom.h	target-mips: replace cpu_save/cpu_load with VMStateDescription	2015-03-11 14:13:57 +00:00
cpu.c	target-mips: replace cpu_save/cpu_load with VMStateDescription	2015-03-11 14:13:57 +00:00
cpu.h	target-mips: add ERETNC instruction and Config5.LLB bit	2015-06-11 10:13:29 +01:00
dsp_helper.c	target-mips: Fix warning from Sparse	2015-03-19 11:11:55 +03:00
gdbstub.c	target-mips: Add missing calls to synchronise SoftFloat status	2014-12-16 12:45:20 +00:00
helper.c	Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141216' into staging	2014-12-17 16:25:21 +00:00
helper.h	target-mips: add ERETNC instruction and Config5.LLB bit	2015-06-11 10:13:29 +01:00
kvm_mips.h	target-mips: kvm: Add main KVM support for MIPS	2014-06-18 16:58:52 +02:00
kvm.c	kvm: introduce kvm_arch_msi_data_to_gsi	2015-06-02 14:56:25 +01:00
lmi_helper.c	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
machine.c	target-mips: add missing MSACSR and restore fp_status and hflags	2015-03-11 14:13:57 +00:00
Makefile.objs	target-mips: add msa_helper.c	2014-11-03 11:48:35 +00:00
mips-defs.h	target-mips: add MSA defines and data structure	2014-11-03 11:48:35 +00:00
msa_helper.c	target-mips: add missing MSACSR and restore fp_status and hflags	2015-03-11 14:13:57 +00:00
op_helper.c	target-mips: add ERETNC instruction and Config5.LLB bit	2015-06-11 10:13:29 +01:00
TODO
translate_init.c	target-mips: add ERETNC instruction and Config5.LLB bit	2015-06-11 10:13:29 +01:00
translate.c	target-mips: add ERETNC instruction and Config5.LLB bit	2015-06-11 10:13:29 +01:00