Alistair Francis cdfc19e456 riscv/virt: Manually define the machine ... Instead of using the DEFINE_MACHINE() macro to define the machine let's do it manually. This allows us to use the machine object to create RISCVVirtState. This is required to add children and aliases to the machine. This patch is no functional change. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2019-10-28 07:47:28 -07:00
..
boot.c	riscv: Resolve full path of the given bios image	2019-09-17 08:42:43 -07:00
Kconfig	riscv: sifive_u: Fix broken GEM support	2019-09-17 08:42:49 -07:00
Makefile.objs	riscv: sifive: Implement a model for SiFive FU540 OTP	2019-09-17 08:42:49 -07:00
riscv_hart.c	riscv: hart: Add a "hartid-base" property to RISC-V hart array	2019-09-17 08:42:47 -07:00
riscv_htif.c
sifive_clint.c
sifive_e_prci.c	riscv: sifive_e: prci: Update the PRCI register block size	2019-09-17 08:42:46 -07:00
sifive_e.c	riscv: sifive_e: Drop sifive_mmio_emulate()	2019-09-17 08:42:46 -07:00
sifive_gpio.c
sifive_plic.c	riscv: plic: Remove unused interrupt functions	2019-09-17 08:42:42 -07:00
sifive_test.c	riscv: hw: Remove the unnecessary include of target/riscv/cpu.h	2019-09-17 08:42:45 -07:00
sifive_u_otp.c	riscv: sifive: Implement a model for SiFive FU540 OTP	2019-09-17 08:42:49 -07:00
sifive_u_prci.c	riscv: sifive: Implement PRCI model for FU540	2019-09-17 08:42:47 -07:00
sifive_u.c	riscv/sifive_u: Add the start-in-flash property	2019-10-28 07:47:28 -07:00
sifive_uart.c	riscv: hw: Remove the unnecessary include of target/riscv/cpu.h	2019-09-17 08:42:45 -07:00
spike.c	riscv: hw: Drop "clock-frequency" property of cpu nodes	2019-10-28 07:47:27 -07:00
trace-events
virt.c	riscv/virt: Manually define the machine	2019-10-28 07:47:28 -07:00