f410b688af
The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode. Hard fail means the system bus will send an HPMC (=crash) to the processor, soft fail means the system bus will ignore timeouts of MMIO-reads or MMIO-writes and return -1ULL. The HF mode is controlled by a bit in the status register and is usually programmed by the OS. Return the corresponing values based on the current value of that bit. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
95 lines
2.1 KiB
C
95 lines
2.1 KiB
C
/*
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* HP-PARISC Astro Bus connector with Elroy PCI host bridges
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*/
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#ifndef ASTRO_H
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#define ASTRO_H
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#include "hw/pci/pci_host.h"
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#define ASTRO_HPA 0xfed00000
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#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
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#define TYPE_ASTRO_CHIP "astro-chip"
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OBJECT_DECLARE_SIMPLE_TYPE(AstroState, ASTRO_CHIP)
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#define TYPE_ELROY_PCI_HOST_BRIDGE "elroy-pcihost"
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OBJECT_DECLARE_SIMPLE_TYPE(ElroyState, ELROY_PCI_HOST_BRIDGE)
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#define ELROY_NUM 4 /* # of Elroys */
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#define ELROY_IRQS 8 /* IOSAPIC IRQs */
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/* ASTRO Memory and I/O regions */
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#define LMMIO_DIST_BASE_ADDR 0xf4000000ULL
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#define LMMIO_DIST_BASE_SIZE 0x4000000ULL
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#define IOS_DIST_BASE_ADDR 0xfffee00000ULL
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#define IOS_DIST_BASE_SIZE 0x10000ULL
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#define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */
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struct AstroState;
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struct ElroyState {
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PCIHostState parent_obj;
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/* parent Astro device */
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struct AstroState *astro;
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/* HPA of this Elroy */
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hwaddr hpa;
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/* PCI bus number (Elroy number) */
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unsigned int pci_bus_num;
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uint64_t config_address;
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uint64_t config_reg_elroy;
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uint64_t status_control;
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uint64_t arb_mask;
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uint64_t mmio_base[(0x0250 - 0x200) / 8];
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uint64_t error_config;
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uint32_t iosapic_reg_select;
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uint64_t iosapic_reg[0x20];
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uint32_t ilr;
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MemoryRegion this_mem;
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MemoryRegion pci_mmio;
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MemoryRegion pci_mmio_alias;
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MemoryRegion pci_hole;
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MemoryRegion pci_io;
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};
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struct AstroState {
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PCIHostState parent_obj;
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uint64_t ioc_ctrl;
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uint64_t ioc_status_ctrl;
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uint64_t ioc_ranges[(0x03d8 - 0x300) / 8];
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uint64_t ioc_rope_config;
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uint64_t ioc_status_control;
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uint64_t ioc_flush_control;
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uint64_t ioc_rope_control[8];
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uint64_t tlb_ibase;
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uint64_t tlb_imask;
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uint64_t tlb_pcom;
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uint64_t tlb_tcnfg;
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uint64_t tlb_pdir_base;
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struct ElroyState *elroy[ELROY_NUM];
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MemoryRegion this_mem;
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MemoryRegion pci_mmio;
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MemoryRegion pci_io;
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IOMMUMemoryRegion iommu;
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AddressSpace iommu_as;
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};
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#endif
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