qemu/hw/riscv
Gavin Shan cd75cc6337 hw/riscv/shakti_c: Check CPU type in machine_run_board_init()
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231204004726.483558-10-gshan@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-01-05 16:20:15 +01:00
..
boot.c target/riscv: rename ext_icsr to ext_zicsr 2023-11-07 11:02:17 +10:00
Kconfig hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b. 2023-07-10 22:29:15 +10:00
meson.build hw/riscv/virt: Enable basic ACPI infrastructure 2023-03-06 11:35:04 -08:00
microchip_pfsoc.c riscv: spelling fixes 2023-09-08 13:08:52 +03:00
numa.c hw/riscv: Fix typo field in error_report 2023-07-19 14:31:41 +10:00
opentitan.c hw/riscv: opentitan: Fixup local variables shadowing 2023-09-29 10:07:20 +02:00
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 2020-09-09 15:54:18 -07:00
shakti_c.c hw/riscv/shakti_c: Check CPU type in machine_run_board_init() 2024-01-05 16:20:15 +01:00
sifive_e.c riscv: Fix SiFive E CLINT clock frequency 2023-11-22 13:57:19 +10:00
sifive_u.c hw/sd: Introduce a "sd-card" SPI variant model 2023-09-01 11:40:04 +02:00
spike.c hw/riscv: Validate cluster and NUMA node boundary 2023-06-26 10:23:01 +02:00
virt-acpi-build.c hw/riscv: Constify VMState 2023-12-30 07:38:06 +11:00
virt.c hw/riscv/virt.c: do create_fdt() earlier, add finalize_fdt() 2023-11-22 13:55:07 +10:00