Peter Maydell cd5c11b84b target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI ...

Define a dummy version of the AArch64 OSLAR_EL1 system register
which just ignores writes. Linux will always write to this (it
is the OS lock used for debugging), but we don't support debug.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

2014-02-26 17:20:05 +00:00

..

arm-semi.c

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cpu64.c

target-arm: A64: Make cache ID registers visible to AArch64

2014-02-26 17:20:01 +00:00

cpu-qom.h

target-arm: Implement AArch64 ID and feature registers

2014-02-26 17:20:05 +00:00

cpu.c

target-arm: Implement AArch64 cache invalidate/clean ops

2014-02-26 17:20:02 +00:00

cpu.h

target-arm: Implement AArch64 dummy breakpoint and watchpoint registers

2014-02-26 17:20:05 +00:00

crypto_helper.c

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gdbstub64.c

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gdbstub.c

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helper-a64.c

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helper-a64.h

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helper.c

target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI

2014-02-26 17:20:05 +00:00

helper.h

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iwmmxt_helper.c

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kvm32.c

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kvm64.c

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kvm_arm.h

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kvm-consts.h

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kvm-stub.c

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kvm.c

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machine.c

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Makefile.objs

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neon_helper.c

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op_addsub.h

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op_helper.c

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translate-a64.c

target-arm: Implement AArch64 CurrentEL sysreg

2014-02-26 17:20:02 +00:00

translate.c

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translate.h

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