qemu/target
Frank Chang cd01340e75 target/riscv: rvv-1.0: integer extension instructions
Add the following instructions:

* vzext.vf2
* vzext.vf4
* vzext.vf8
* vsext.vf2
* vsext.vf4
* vsext.vf8

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211210075704.23951-41-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-12-20 14:51:36 +10:00
..
alpha
arm
avr
cris
hexagon
hppa
i386
m68k
microblaze
mips
nios2
openrisc
ppc
riscv target/riscv: rvv-1.0: integer extension instructions 2021-12-20 14:51:36 +10:00
rx
s390x
sh4
sparc
tricore
xtensa
Kconfig
meson.build