bda19d7bb5
Add the RX machine internally simulated in GDB. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Use TYPE_RX62N_CPU, use #define for RX62N_NR_TMR/CMT/SCI, renamed CPU -> MCU, device -> microcontroller] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200224141923.82118-18-ysato@users.sourceforge.jp> [PMD: Split of MCU, rename gdbsim, Add gdbsim-r5f562n7/r5f562n8] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
77 lines
2.0 KiB
C
77 lines
2.0 KiB
C
/*
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* RX62N MCU Object
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*
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* Datasheet: RX62N Group, RX621 Group User's Manual: Hardware
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* (Rev.1.40 R01UH0033EJ0140)
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*
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* Copyright (c) 2019 Yoshinori Sato
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_RX_RX62N_MCU_H
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#define HW_RX_RX62N_MCU_H
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#include "target/rx/cpu.h"
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#include "hw/intc/rx_icu.h"
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#include "hw/timer/renesas_tmr.h"
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#include "hw/timer/renesas_cmt.h"
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#include "hw/char/renesas_sci.h"
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#include "qemu/units.h"
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#define TYPE_RX62N_MCU "rx62n-mcu"
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#define RX62N_MCU(obj) OBJECT_CHECK(RX62NState, (obj), TYPE_RX62N_MCU)
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#define TYPE_R5F562N7_MCU "r5f562n7-mcu"
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#define TYPE_R5F562N8_MCU "r5f562n8-mcu"
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#define EXT_CS_BASE 0x01000000
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#define VECTOR_TABLE_BASE 0xffffff80
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#define RX62N_CFLASH_BASE 0xfff80000
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#define RX62N_NR_TMR 2
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#define RX62N_NR_CMT 2
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#define RX62N_NR_SCI 6
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typedef struct RX62NState {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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RXCPU cpu;
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RXICUState icu;
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RTMRState tmr[RX62N_NR_TMR];
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RCMTState cmt[RX62N_NR_CMT];
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RSCIState sci[RX62N_NR_SCI];
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MemoryRegion *sysmem;
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bool kernel;
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MemoryRegion iram;
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MemoryRegion iomem1;
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MemoryRegion d_flash;
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MemoryRegion iomem2;
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MemoryRegion iomem3;
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MemoryRegion c_flash;
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qemu_irq irq[NR_IRQS];
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/* Input Clock (XTAL) frequency */
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uint32_t xtal_freq_hz;
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/* Peripheral Module Clock frequency */
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uint32_t pclk_freq_hz;
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} RX62NState;
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#endif
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