879f60f01c
The Ibex core contains a PLIC that although similar to the RISC-V spec is not RISC-V spec compliant. This patch implements a Ibex PLIC in a somewhat generic way. As the current RISC-V PLIC needs tidying up, my hope is that as the Ibex PLIC move towards spec compliance this PLIC implementation can be updated until it can replace the current PLIC. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
/*
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* QEMU RISC-V lowRISC Ibex PLIC
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*
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* Copyright (c) 2020 Western Digital
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_IBEX_PLIC_H
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#define HW_IBEX_PLIC_H
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#include "hw/sysbus.h"
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#define TYPE_IBEX_PLIC "ibex-plic"
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#define IBEX_PLIC(obj) \
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OBJECT_CHECK(IbexPlicState, (obj), TYPE_IBEX_PLIC)
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typedef struct IbexPlicState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion mmio;
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uint32_t *pending;
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uint32_t *source;
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uint32_t *priority;
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uint32_t *enable;
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uint32_t threshold;
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uint32_t claim;
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/* config */
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uint32_t num_cpus;
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uint32_t num_sources;
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uint32_t pending_base;
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uint32_t pending_num;
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uint32_t source_base;
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uint32_t source_num;
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uint32_t priority_base;
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uint32_t priority_num;
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uint32_t enable_base;
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uint32_t enable_num;
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uint32_t threshold_base;
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uint32_t claim_base;
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} IbexPlicState;
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#endif /* HW_IBEX_PLIC_H */
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