75cacb128b
On the Alpha DP264 machine, the Cirrus VGA is I/O mapped in the 3C0H-3CFH range, thus I/O base used by the parallel device clashes, and sincea4cb773928the VGA is not working: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 00000801fc000000-00000801fdffffff (prio 0, i/o): pci0-io ... 00000801fc0003b4-00000801fc0003b5 (prio 0, i/o): vga 00000801fc0003ba-00000801fc0003ba (prio 0, i/o): vga 00000801fc0003bc-00000801fc0003c3 (prio 0, i/o): parallel ^^^ ^^^^^^^^ 00000801fc0003c0-00000801fc0003cf (prio 0, i/o): vga ^^^ 00000801fc0003d4-00000801fc0003d5 (prio 0, i/o): vga 00000801fc0003da-00000801fc0003da (prio 0, i/o): vga ... As there is no particular reason to use this base address (introduced in7bea0dd434), change to 378H which is the default on PC machines. Reported-by: Emilio G. Cota <cota@braap.org> Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Tested-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180614233935.26585-1-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
116 lines
2.6 KiB
C
116 lines
2.6 KiB
C
/*
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* SMC FDC37C669 Super I/O controller
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*
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* Copyright (c) 2018 Philippe Mathieu-Daudé
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*
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* This code is licensed under the GNU GPLv2 and later.
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* See the COPYING file in the top-level directory.
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "hw/isa/superio.h"
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/* UARTs (compatible with NS16450 or PC16550) */
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static bool is_serial_enabled(ISASuperIODevice *sio, uint8_t index)
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{
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return index < 2;
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}
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static uint16_t get_serial_iobase(ISASuperIODevice *sio, uint8_t index)
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{
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return index ? 0x2f8 : 0x3f8;
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}
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static unsigned int get_serial_irq(ISASuperIODevice *sio, uint8_t index)
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{
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return index ? 3 : 4;
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}
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/* Parallel port */
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static bool is_parallel_enabled(ISASuperIODevice *sio, uint8_t index)
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{
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return index < 1;
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}
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static uint16_t get_parallel_iobase(ISASuperIODevice *sio, uint8_t index)
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{
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return 0x378;
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}
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static unsigned int get_parallel_irq(ISASuperIODevice *sio, uint8_t index)
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{
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return 7;
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}
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static unsigned int get_parallel_dma(ISASuperIODevice *sio, uint8_t index)
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{
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return 3;
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}
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/* Diskette controller (Software compatible with the Intel PC8477) */
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static bool is_fdc_enabled(ISASuperIODevice *sio, uint8_t index)
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{
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return index < 1;
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}
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static uint16_t get_fdc_iobase(ISASuperIODevice *sio, uint8_t index)
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{
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return 0x3f0;
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}
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static unsigned int get_fdc_irq(ISASuperIODevice *sio, uint8_t index)
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{
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return 6;
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}
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static unsigned int get_fdc_dma(ISASuperIODevice *sio, uint8_t index)
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{
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return 2;
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}
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static void smc37c669_class_init(ObjectClass *klass, void *data)
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{
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ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
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sc->parallel = (ISASuperIOFuncs){
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.count = 1,
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.is_enabled = is_parallel_enabled,
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.get_iobase = get_parallel_iobase,
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.get_irq = get_parallel_irq,
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.get_dma = get_parallel_dma,
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};
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sc->serial = (ISASuperIOFuncs){
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.count = 2,
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.is_enabled = is_serial_enabled,
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.get_iobase = get_serial_iobase,
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.get_irq = get_serial_irq,
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};
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sc->floppy = (ISASuperIOFuncs){
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.count = 1,
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.is_enabled = is_fdc_enabled,
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.get_iobase = get_fdc_iobase,
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.get_irq = get_fdc_irq,
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.get_dma = get_fdc_dma,
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};
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sc->ide.count = 0;
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}
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static const TypeInfo smc37c669_type_info = {
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.name = TYPE_SMC37C669_SUPERIO,
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.parent = TYPE_ISA_SUPERIO,
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.instance_size = sizeof(ISASuperIODevice),
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.class_size = sizeof(ISASuperIOClass),
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.class_init = smc37c669_class_init,
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};
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static void smc37c669_register_types(void)
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{
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type_register_static(&smc37c669_type_info);
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}
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type_init(smc37c669_register_types)
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