Ilya Leoshkevich 6da170beda target/s390x: Fix shifting 32-bit values for more than 31 bits ... According to PoP, both 32- and 64-bit shifts use lowest 6 address bits. The current code special-cases 32-bit shifts to use only 5 bits, which is not correct. For example, shifting by 32 bits currently preserves the initial value, however, it's supposed zero it out instead. Fix by merging sh32 and sh64 and adapting CC calculation to shift values greater than 31. Fixes: cbe24bfa91 ("target-s390: Convert SHIFT, ROTATE SINGLE") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220112165016.226996-5-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>		2022-01-17 08:36:33 +01:00
..
cc_helper.c	target/s390x: Fix shifting 32-bit values for more than 31 bits	2022-01-17 08:36:33 +01:00
crypto_helper.c
excp_helper.c	target/s390x: Implement s390x_cpu_record_sigbus	2021-11-02 07:00:52 -04:00
fpu_helper.c
insn-data.def	target/s390x: Fix shifting 32-bit values for more than 31 bits	2022-01-17 08:36:33 +01:00
insn-format.def
int_helper.c
mem_helper.c	exec/memop: Adding signedness to quad definitions	2022-01-08 15:46:10 +10:00
meson.build
misc_helper.c	s390x/tcg: fix and optimize SPX (SET PREFIX)	2021-09-06 16:23:16 +02:00
s390-tod.h
tcg_s390x.h
translate_vx.c.inc	exec/memop: Adding signedness to quad definitions	2022-01-08 15:46:10 +10:00
translate.c	target/s390x: Fix shifting 32-bit values for more than 31 bits	2022-01-17 08:36:33 +01:00
vec_fpu_helper.c
vec_helper.c
vec_int_helper.c
vec_string_helper.c
vec.h