2ed40ec1e0
Fixed inconsistency between the regisiter bit field definition header file and the ast2600 datasheet. The reg name is I2CD1C:Pool Buffer Control Register in old register mode and I2CC0C: Master/Slave Pool Buffer Control Register in new register mode. They share bit field [12:8]:Transmit Data Byte Count and bit field [29:24]:Actual Received Pool Buffer Size according to the datasheet. According to the ast2600 datasheet,the actual Tx count is Transmit Data Byte Count plus 1, and the max Rx size is Receive Pool Buffer Size plus 1, both in Pool Buffer Control Register. The version before forgot to plus 1, and mistake Rx count for Rx size. Signed-off-by: Hang Yu <francis_yuu@stu.pku.edu.cn> Fixes: |
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| .. | ||
| arm_sbcon_i2c.h | ||
| aspeed_i2c.h | ||
| bitbang_i2c.h | ||
| i2c_mux_pca954x.h | ||
| i2c.h | ||
| imx_i2c.h | ||
| microbit_i2c.h | ||
| npcm7xx_smbus.h | ||
| pm_smbus.h | ||
| pmbus_device.h | ||
| ppc4xx_i2c.h | ||
| smbus_eeprom.h | ||
| smbus_master.h | ||
| smbus_slave.h | ||