qemu/target
Peter Maydell e7c6a8cf9f AVR patches queue
- Only reset 'interrupt_request' mask once all interrupts executed
 - Documentation and typo fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmBOoB4ACgkQ4+MsLN6t
 wN6zIg//SrDsBYfL1ffrN5/Tut3SZZW1+Xh4sO/3sLDE8Fbh1eQlpoT6fKdL6TE+
 GbKMggt/rGE/8ler9QBWg5/vSdrUHa0jAK+pgpDBESP+u1xCc1AiSUE9Rz8pZMr/
 K0DznGvZPSw3CCjodsANHJF9WpqWh4lj2ZgsVqL7911xdyRDBFyD+1zkJYvPtOCh
 OiCCVbUOShS9D5VvonOBNTqS7g11/H9H4l/h8TgiMit8qTEjVsy4KW4yzZA9XotJ
 EiOQwf4OdbWtw5L99234+MjreU30v4vuxw1HffHRPCFXFZ7Qwy6yhdmEyXAPMCtP
 SOhTWHfFLptSJLs+D2OqK4SupTeiRJihKXxJmqmDAq9n+a6R7DnHiTSZZY8t6sMb
 xW7Qlbggptn2XhAa6wP+VDEZbugkDv4qHPQnLS0R1sd1lNZ2r3Y7SUbgobJ9eU4I
 KUBTH2rCHFaHyNxcX7opqdEhefUlvlHsC8iq5F1AoJPLGdfXGzot/pe/63UMA7f+
 F9BowxQd2G6qzXg4IOV802EenlgoUuOvxnAeEvpBBnaGtZ5FjDSnA0nhhUJhRo22
 TlrlqvCfrXbH2AKyQ/fatffYdp/uvzIymD8VKd9+jr3IbxfsVCapKj6BxSRrQeTc
 Pno1CUecNApBoCPy74PU3oFK+UMuj0WourZJkLG6rVJqPDJnFXw=
 =LKo7
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/philmd/tags/avr-20210315' into staging

AVR patches queue

- Only reset 'interrupt_request' mask once all interrupts executed
- Documentation and typo fixes

# gpg: Signature made Sun 14 Mar 2021 23:45:34 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/avr-20210315:
  target/avr: Fix interrupt execution
  target/avr: Fix some comment spelling errors
  hw/avr/arduino: List board schematic links
  hw/misc/led: Add yellow LED

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-15 16:59:55 +00:00
..
alpha cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
arm hw/arm/virt: KVM: The IPA lower bound is 32 2021-03-12 12:47:11 +00:00
avr target/avr: Fix interrupt execution 2021-03-15 00:39:52 +01:00
cris target/cris: Plug leakage of TCG temporaries 2021-02-22 09:04:58 +01:00
hexagon target/hexagon/gen_tcg_funcs: Fix a typo 2021-03-09 21:31:34 +01:00
hppa exec: Use cpu_untagged_addr in g2h; split out g2h_untagged 2021-02-16 11:04:53 +00:00
i386 sysemu: Let VMChangeStateHandler take boolean 'running' argument 2021-03-09 23:13:57 +01:00
lm32 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
m68k Prepare MacOS ROM support: 2021-03-12 18:56:56 +00:00
microblaze cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
mips target/mips/tx79: Salvage instructions description comment 2021-03-13 23:43:30 +01:00
moxie exec: Move TranslationBlock typedef to qemu/typedefs.h 2021-02-18 08:19:08 +00:00
nios2 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
openrisc cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
ppc ppc patch queue for 2021-03-10 2021-03-12 11:30:55 +00:00
riscv Pull request 2021-03-11 18:55:27 +00:00
rx cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
s390x target/s390x/kvm: Simplify debug code 2021-03-04 14:19:08 +01:00
sh4 target/sh4: Remove unused definitions 2021-03-06 16:18:42 +01:00
sparc cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
tricore target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 2021-03-14 14:49:01 +01:00
unicore32 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
xtensa semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
meson.build Remove deprecated target tilegx 2021-03-09 11:26:32 +01:00