qemu/target/ppc
Suraj Jitindar Singh c88305027d target/ppc: Change tlbie invalid fields for POWER9 support
The tlbie[l] instructions are used to invalidate TLB entries used to cache
address translations.

In ISAv3.00 (POWER9) more fields were added to the tblie[l] instructions
which were previously invalid. We don't care about any of these new fields
since we just invalidate the whole world anyway but we need to not
cause an illegal instruction exception when the instructions are called.
We also don't want to allow an older processor to have these fields set
since that would be invalid.

Add a new GEN_HANDLER for the ISAv3 instructions with the correct invalid
mask. These will only be generated to a POWER9 processor for now based on
the instruction flag. Also remove the PPC_MEM_TLBIE instruction flag from
the POWER9 processor definition to ensure the old tlbie isn't generated.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-05-11 09:45:15 +10:00
..
translate target-ppc: Add xscvqpudz and xscvqpuwz instructions 2017-02-22 11:28:28 +11:00
arch_dump.c target/ppc: Fix size of struct PPCElfPrstatus 2017-04-26 12:41:55 +10:00
compat.c target/ppc: Add POWER9/ISAv3.00 to compat_table 2017-03-03 11:30:59 +11:00
cpu-models.c target/ppc/cpu-models: Fix/remove bad CPU aliases 2017-01-31 13:46:26 +11:00
cpu-models.h powerpc/cpu-models: rename ISAv3.00 logical PVR definition 2017-01-31 10:10:14 +11:00
cpu-qom.h spapr: Add ibm,processor-radix-AP-encodings to the device tree 2017-04-26 12:00:41 +10:00
cpu.c target/ppc: support for 32-bit carry and overflow 2017-03-01 11:23:39 +11:00
cpu.h tcg: enable MTTCG by default for PPC64 on x86 2017-05-11 09:45:15 +10:00
dfp_helper.c
excp_helper.c target/ppc: do not reset reserve_addr in exec_enter 2017-05-11 09:45:15 +10:00
fpu_helper.c target/ppc: use helper for excp handling 2017-03-06 13:17:28 +11:00
gdbstub.c
helper_regs.h cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
helper.h target/ppc: Flush TLB on write to PIDR 2017-04-26 12:41:56 +10:00
int_helper.c target/ppc: introduce helper_update_ov_legacy 2017-03-01 11:23:39 +11:00
internal.h target-ppc: implement load atomic instruction 2017-02-22 11:28:27 +11:00
kvm_ppc.h target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce 2017-04-26 12:00:41 +10:00
kvm-stub.c
kvm.c target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce 2017-04-26 12:00:41 +10:00
machine.c target/ppc: Manage external HPT via virtual hypervisor 2017-03-01 11:23:39 +11:00
Makefile.objs target/ppc/POWER9: Add POWER9 mmu fault handler 2017-03-03 11:30:59 +11:00
mem_helper.c target-ppc: implement stxvll instructions 2017-01-31 10:10:13 +11:00
mfrom_table_gen.c
mfrom_table.c
misc_helper.c target/ppc: Flush TLB on write to PIDR 2017-04-26 12:41:56 +10:00
mmu_helper.c spapr: Small cleanup of PPC MMU enums 2017-03-03 11:30:59 +11:00
mmu-book3s-v3.c target/ppc/POWER9: Add POWER9 mmu fault handler 2017-03-03 11:30:59 +11:00
mmu-book3s-v3.h target/ppc/POWER9: Add POWER9 mmu fault handler 2017-03-03 11:30:59 +11:00
mmu-hash32.c target/ppc: Eliminate htab_base and htab_mask variables 2017-03-01 11:23:39 +11:00
mmu-hash32.h target/ppc: Manage external HPT via virtual hypervisor 2017-03-01 11:23:39 +11:00
mmu-hash64.c spapr: Small cleanup of PPC MMU enums 2017-03-03 11:30:59 +11:00
mmu-hash64.h target/ppc: Correct SDR1 masking 2017-03-01 11:23:39 +11:00
monitor.c monitor: Fix crashes when using HMP commands without CPU 2017-02-21 18:29:01 +00:00
STATUS
timebase_helper.c
trace-events
translate_init.c target/ppc: Change tlbie invalid fields for POWER9 support 2017-05-11 09:45:15 +10:00
translate.c target/ppc: Change tlbie invalid fields for POWER9 support 2017-05-11 09:45:15 +10:00
user_only_helper.c