c87b152072
This is a pc & q35 only machine opt. If you add enough PCI devices then all mmio for them will not fit below 4G which may not be the layout the user wanted. This allows you to increase the below 4G address space that PCI devices can use (aka decrease ram below 4G) and therefore in more cases not have any mmio that is above 4G. For example using "-machine pc,max-ram-below-4g=2G" on the command line will limit the amount of ram that is below 4G to 2G. Note: this machine option cannot be used to increase the amount of ram below 4G. Signed-off-by: Don Slutz <dslutz@verizon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> MST: fix 32 bit
530 lines
15 KiB
C
530 lines
15 KiB
C
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu-common.h"
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#include "exec/memory.h"
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#include "hw/boards.h"
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#include "hw/isa/isa.h"
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#include "hw/block/fdc.h"
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#include "net/net.h"
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#include "hw/i386/ioapic.h"
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#include "qemu/range.h"
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#include "qemu/bitmap.h"
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#include "sysemu/sysemu.h"
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#include "hw/pci/pci.h"
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#include "hw/boards.h"
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#define HPET_INTCAP "hpet-intcap"
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/**
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* PCMachineState:
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* @hotplug_memory_base: address in guest RAM address space where hotplug memory
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* address space begins.
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* @hotplug_memory: hotplug memory addess space container
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* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
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*/
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struct PCMachineState {
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/*< private >*/
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MachineState parent_obj;
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/* <public> */
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ram_addr_t hotplug_memory_base;
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MemoryRegion hotplug_memory;
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HotplugHandler *acpi_dev;
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uint64_t max_ram_below_4g;
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};
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#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
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#define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
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#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
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/**
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* PCMachineClass:
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* @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
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*/
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struct PCMachineClass {
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/*< private >*/
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MachineClass parent_class;
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/*< public >*/
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HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
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DeviceState *dev);
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};
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typedef struct PCMachineState PCMachineState;
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typedef struct PCMachineClass PCMachineClass;
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#define TYPE_PC_MACHINE "generic-pc-machine"
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#define PC_MACHINE(obj) \
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OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
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#define PC_MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
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#define PC_MACHINE_CLASS(klass) \
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OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
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void qemu_register_pc_machine(QEMUMachine *m);
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/* PC-style peripherals (also used by other machines). */
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typedef struct PcPciInfo {
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Range w32;
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Range w64;
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} PcPciInfo;
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#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
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#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
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#define ACPI_PM_PROP_S4_VAL "s4_val"
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#define ACPI_PM_PROP_SCI_INT "sci_int"
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#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
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#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
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#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
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#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
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#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
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struct PcGuestInfo {
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bool has_pci_info;
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bool isapc_ram_fw;
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hwaddr ram_size, ram_size_below_4g;
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unsigned apic_id_limit;
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bool apic_xrupt_override;
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uint64_t numa_nodes;
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uint64_t *node_mem;
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uint64_t *node_cpu;
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FWCfgState *fw_cfg;
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bool has_acpi_build;
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bool has_reserved_memory;
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};
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/* parallel.c */
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static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
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{
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DeviceState *dev;
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ISADevice *isadev;
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isadev = isa_try_create(bus, "isa-parallel");
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if (!isadev) {
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return false;
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}
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dev = DEVICE(isadev);
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qdev_prop_set_uint32(dev, "index", index);
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qdev_prop_set_chr(dev, "chardev", chr);
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if (qdev_init(dev) < 0) {
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return false;
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}
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return true;
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}
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bool parallel_mm_init(MemoryRegion *address_space,
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hwaddr base, int it_shift, qemu_irq irq,
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CharDriverState *chr);
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/* i8259.c */
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extern DeviceState *isa_pic;
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qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
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qemu_irq *kvm_i8259_init(ISABus *bus);
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int pic_read_irq(DeviceState *d);
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int pic_get_output(DeviceState *d);
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void pic_info(Monitor *mon, const QDict *qdict);
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void irq_info(Monitor *mon, const QDict *qdict);
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/* Global System Interrupts */
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#define GSI_NUM_PINS IOAPIC_NUM_PINS
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typedef struct GSIState {
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qemu_irq i8259_irq[ISA_NUM_IRQS];
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
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} GSIState;
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void gsi_handler(void *opaque, int n, int level);
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/* vmport.c */
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typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
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static inline void vmport_init(ISABus *bus)
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{
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isa_create_simple(bus, "vmport");
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}
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void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
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void vmmouse_get_data(uint32_t *data);
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void vmmouse_set_data(const uint32_t *data);
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/* pckbd.c */
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void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
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void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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MemoryRegion *region, ram_addr_t size,
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hwaddr mask);
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void i8042_isa_mouse_fake_event(void *opaque);
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void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
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/* pc.c */
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extern int fd_bootchk;
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void pc_register_ferr_irq(qemu_irq irq);
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
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void pc_hot_add_cpu(const int64_t id, Error **errp);
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void pc_acpi_init(const char *default_dsdt);
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PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size);
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#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
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#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
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void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
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MemoryRegion *pci_address_space);
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FWCfgState *pc_memory_init(MachineState *machine,
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MemoryRegion *system_memory,
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ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size,
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MemoryRegion *rom_memory,
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MemoryRegion **ram_memory,
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PcGuestInfo *guest_info);
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qemu_irq *pc_allocate_cpu_irq(void);
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DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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ISADevice **floppy,
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bool no_vmport,
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uint32 hpet_irqs);
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void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
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void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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const char *boot_device,
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ISADevice *floppy, BusState *ide0, BusState *ide1,
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ISADevice *s);
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void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_pci_device_init(PCIBus *pci_bus);
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typedef void (*cpu_set_smm_t)(int smm, void *arg);
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void cpu_smm_register(cpu_set_smm_t callback, void *arg);
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void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
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/* acpi_piix.c */
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I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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qemu_irq sci_irq, qemu_irq smi_irq,
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int kvm_enabled, FWCfgState *fw_cfg,
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DeviceState **piix4_pm);
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void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
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/* hpet.c */
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extern int no_hpet;
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/* piix_pci.c */
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struct PCII440FXState;
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typedef struct PCII440FXState PCII440FXState;
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PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
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ISABus **isa_bus, qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io,
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ram_addr_t ram_size,
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ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size,
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MemoryRegion *pci_memory,
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MemoryRegion *ram_memory);
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PCIBus *find_i440fx(void);
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/* piix4.c */
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extern PCIDevice *piix4_dev;
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int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
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/* vga.c */
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enum vga_retrace_method {
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VGA_RETRACE_DUMB,
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VGA_RETRACE_PRECISE
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};
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extern enum vga_retrace_method vga_retrace_method;
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int isa_vga_mm_init(hwaddr vram_base,
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hwaddr ctrl_base, int it_shift,
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MemoryRegion *address_space);
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/* ne2000.c */
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static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
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{
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DeviceState *dev;
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ISADevice *isadev;
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qemu_check_nic_model(nd, "ne2k_isa");
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isadev = isa_try_create(bus, "ne2k_isa");
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if (!isadev) {
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return false;
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}
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dev = DEVICE(isadev);
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qdev_prop_set_uint32(dev, "iobase", base);
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qdev_prop_set_uint32(dev, "irq", irq);
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qdev_set_nic_properties(dev, nd);
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qdev_init_nofail(dev);
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return true;
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}
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/* pc_sysfw.c */
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void pc_system_firmware_init(MemoryRegion *rom_memory,
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bool isapc_ram_fw);
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/* pvpanic.c */
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uint16_t pvpanic_port(void);
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/* e820 types */
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#define E820_RAM 1
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#define E820_RESERVED 2
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#define E820_ACPI 3
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#define E820_NVS 4
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#define E820_UNUSABLE 5
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int e820_add_entry(uint64_t, uint64_t, uint32_t);
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int e820_get_num_entries(void);
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bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
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#define PC_Q35_COMPAT_2_0 \
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PC_COMPAT_2_0, \
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{\
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.driver = "ICH9-LPC",\
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.property = "memory-hotplug-support",\
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.value = "off",\
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},{\
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.driver = "xio3130-downstream",\
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.property = COMPAT_PROP_PCP,\
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.value = "off",\
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},{\
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.driver = "ioh3420",\
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.property = COMPAT_PROP_PCP,\
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.value = "off",\
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}
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#define PC_Q35_COMPAT_1_7 \
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PC_COMPAT_1_7, \
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PC_Q35_COMPAT_2_0, \
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{\
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.driver = "hpet",\
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.property = HPET_INTCAP,\
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.value = stringify(4),\
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}
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#define PC_Q35_COMPAT_1_6 \
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PC_COMPAT_1_6, \
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PC_Q35_COMPAT_1_7
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#define PC_Q35_COMPAT_1_5 \
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PC_COMPAT_1_5, \
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PC_Q35_COMPAT_1_6
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#define PC_Q35_COMPAT_1_4 \
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PC_COMPAT_1_4, \
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PC_Q35_COMPAT_1_5
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#define PC_COMPAT_2_0 \
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{\
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.driver = "virtio-scsi-pci",\
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.property = "any_layout",\
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.value = "off",\
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},{\
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.driver = "PIIX4_PM",\
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.property = "memory-hotplug-support",\
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.value = "off",\
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},\
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{\
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.driver = "apic",\
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.property = "version",\
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.value = stringify(0x11),\
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},\
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{\
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.driver = "nec-usb-xhci",\
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.property = "superspeed-ports-first",\
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.value = "off",\
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},\
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{\
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.driver = "pci-serial",\
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.property = "prog_if",\
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.value = stringify(0),\
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},\
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{\
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.driver = "pci-serial-2x",\
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.property = "prof_if",\
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.value = stringify(0),\
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},\
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{\
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.driver = "pci-serial-4x",\
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.property = "prog_if",\
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.value = stringify(0),\
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},\
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{\
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.driver = "virtio-net-pci",\
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.property = "guest_announce",\
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.value = "off",\
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}
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#define PC_COMPAT_1_7 \
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PC_COMPAT_2_0, \
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{\
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.driver = TYPE_USB_DEVICE,\
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.property = "msos-desc",\
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.value = "no",\
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},\
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{\
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.driver = "PIIX4_PM",\
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.property = "acpi-pci-hotplug-with-bridge-support",\
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.value = "off",\
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}
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#define PC_COMPAT_1_6 \
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PC_COMPAT_1_7, \
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{\
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.driver = "e1000",\
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.property = "mitigation",\
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.value = "off",\
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},{\
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.driver = "qemu64-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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},{\
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.driver = "qemu32-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(3),\
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},{\
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.driver = "i440FX-pcihost",\
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.property = "short_root_bus",\
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.value = stringify(1),\
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},{\
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.driver = "q35-pcihost",\
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.property = "short_root_bus",\
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.value = stringify(1),\
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}
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#define PC_COMPAT_1_5 \
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PC_COMPAT_1_6, \
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{\
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.driver = "Conroe-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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},{\
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.driver = "Conroe-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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},{\
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.driver = "Penryn-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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},{\
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.driver = "Penryn-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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},{\
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.driver = "Nehalem-" TYPE_X86_CPU,\
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.property = "model",\
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.value = stringify(2),\
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},{\
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.driver = "Nehalem-" TYPE_X86_CPU,\
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.property = "level",\
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.value = stringify(2),\
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},{\
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.driver = "virtio-net-pci",\
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.property = "any_layout",\
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.value = "off",\
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},{\
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.driver = TYPE_X86_CPU,\
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.property = "pmu",\
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.value = "on",\
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},{\
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.driver = "i440FX-pcihost",\
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.property = "short_root_bus",\
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.value = stringify(0),\
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},{\
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.driver = "q35-pcihost",\
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.property = "short_root_bus",\
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.value = stringify(0),\
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}
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#define PC_COMPAT_1_4 \
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PC_COMPAT_1_5, \
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{\
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.driver = "scsi-hd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "scsi-cd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "scsi-disk",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "ide-hd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "ide-cd",\
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.property = "discard_granularity",\
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.value = stringify(0),\
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},{\
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.driver = "ide-drive",\
|
|
.property = "discard_granularity",\
|
|
.value = stringify(0),\
|
|
},{\
|
|
.driver = "virtio-blk-pci",\
|
|
.property = "discard_granularity",\
|
|
.value = stringify(0),\
|
|
},{\
|
|
.driver = "virtio-serial-pci",\
|
|
.property = "vectors",\
|
|
/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
|
|
.value = stringify(0xFFFFFFFF),\
|
|
},{ \
|
|
.driver = "virtio-net-pci", \
|
|
.property = "ctrl_guest_offloads", \
|
|
.value = "off", \
|
|
},{\
|
|
.driver = "e1000",\
|
|
.property = "romfile",\
|
|
.value = "pxe-e1000.rom",\
|
|
},{\
|
|
.driver = "ne2k_pci",\
|
|
.property = "romfile",\
|
|
.value = "pxe-ne2k_pci.rom",\
|
|
},{\
|
|
.driver = "pcnet",\
|
|
.property = "romfile",\
|
|
.value = "pxe-pcnet.rom",\
|
|
},{\
|
|
.driver = "rtl8139",\
|
|
.property = "romfile",\
|
|
.value = "pxe-rtl8139.rom",\
|
|
},{\
|
|
.driver = "virtio-net-pci",\
|
|
.property = "romfile",\
|
|
.value = "pxe-virtio.rom",\
|
|
},{\
|
|
.driver = "486-" TYPE_X86_CPU,\
|
|
.property = "model",\
|
|
.value = stringify(0),\
|
|
}
|
|
|
|
#define PC_COMMON_MACHINE_OPTIONS \
|
|
.default_boot_order = "cad"
|
|
|
|
#define PC_DEFAULT_MACHINE_OPTIONS \
|
|
PC_COMMON_MACHINE_OPTIONS, \
|
|
.hot_add_cpu = pc_hot_add_cpu, \
|
|
.max_cpus = 255
|
|
|
|
#endif
|