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Richard Henderson c7715b6b51 target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub} 
Provide a functional interface for the vector expansion.
This fits better with the existing set of helpers that
we provide for other operations.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200513163245.17915-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-14 15:03:08 +01:00
..
a32-uncond.decode
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a32.decode
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arch_dump.c
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arm_ldst.h
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arm-powerctl.c
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arm-powerctl.h
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arm-semi.c
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cpu64.c
target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]
2020-05-11 11:45:59 +01:00
cpu_tcg.c
target/arm: Use correct GDB XML for M-profile cores
2020-05-14 15:03:08 +01:00
cpu-param.h
target/arm: Don't use a TLB for ARMMMUIdx_Stage2
2020-05-04 10:32:46 +01:00
cpu-qom.h
target/arm: Make cpu_register() available for other files
2020-04-30 15:35:41 +01:00
cpu.c
target/arm: Restrict TCG cpus to TCG accel
2020-05-11 11:45:59 +01:00
cpu.h
target/arm: Make set_feature() available for other files
2020-05-11 11:45:59 +01:00
crypto_helper.c
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debug_helper.c
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gdbstub64.c
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gdbstub.c
target/arm: Use correct GDB XML for M-profile cores
2020-05-14 15:03:08 +01:00
helper-a64.c
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helper-a64.h
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helper-sve.h
target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA
2020-05-11 11:59:22 +01:00
helper.c
target/arm: Drop access_el3_aa32ns_aa64any()
2020-05-11 10:57:42 +01:00
helper.h
target/arm: Create gen_gvec_{sri,sli}
2020-05-14 15:03:08 +01:00
idau.h
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internals.h
target/arm: Remove sve_memopidx
2020-05-11 11:22:06 +01:00
iwmmxt_helper.c
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kvm32.c
target/arm/kvm: Inline set_feature() calls
2020-05-11 11:45:59 +01:00
kvm64.c
target/arm/kvm: Inline set_feature() calls
2020-05-11 11:45:59 +01:00
kvm_arm.h
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kvm-consts.h
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kvm-stub.c
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kvm.c
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m_helper.c
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machine.c
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Makefile.objs
target/arm: Restrict TCG cpus to TCG accel
2020-05-11 11:45:59 +01:00
monitor.c
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neon_helper.c
target/arm: Vectorize integer comparison vs zero
2020-04-30 15:35:41 +01:00
neon-dp.decode
target/arm: Swap argument order for VSHL during decode
2020-05-14 15:03:08 +01:00
neon-ls.decode
target/arm: Convert Neon 'load/store single structure' to decodetree
2020-05-04 12:57:56 +01:00
neon-shared.decode
target/arm: Convert VFM[AS]L (scalar) to decodetree
2020-05-04 12:57:56 +01:00
op_addsub.h
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op_helper.c
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pauth_helper.c
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psci.c
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sve_helper.c
target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA
2020-05-11 11:59:22 +01:00
sve.decode
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t16.decode
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t32.decode
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tlb_helper.c
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trace-events
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translate-a64.c
target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}
2020-05-14 15:03:08 +01:00
translate-a64.h
target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree
2020-05-04 12:57:56 +01:00
translate-neon.inc.c
target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}
2020-05-14 15:03:08 +01:00
translate-sve.c
target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed)
2020-05-11 14:22:54 +01:00
translate-vfp.inc.c
target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check
2020-05-04 12:57:56 +01:00
translate.c
target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}
2020-05-14 15:03:08 +01:00
translate.h
target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}
2020-05-14 15:03:08 +01:00
vec_helper.c
target/arm: Create gen_gvec_{sri,sli}
2020-05-14 15:03:08 +01:00
vfp_helper.c
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vfp-uncond.decode
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vfp.decode
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