qemu/target
Pavel Dovgalyuk c6c2c0fc32 mips: set CP0 Debug DExcCode for SDBBP instruction
This patch fixes setting DExcCode field of CP0 Debug register
when SDBBP instruction is executed. According to EJTAG specification,
this field must be set to the value 9 (Bp).

Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Message-id: 20170502120350.3368.92338.stgit@PASHA-ISP
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2017-07-17 16:48:21 +02:00
..
alpha target/alpha: Use tcg_gen_lookup_and_goto_ptr 2017-06-19 11:11:25 -07:00
arm target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode 2017-07-11 11:21:26 +01:00
cris qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
hppa target/hppa: Use tcg_gen_lookup_and_goto_ptr 2017-06-05 09:25:42 -07:00
i386 * gdbstub fixes (Alex) 2017-07-14 12:16:09 +01:00
lm32 qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
m68k target/m68k: add fmovem 2017-06-29 20:29:57 +02:00
microblaze target-microblaze: Add CPU version 10.0 2017-07-04 09:22:20 +02:00
mips mips: set CP0 Debug DExcCode for SDBBP instruction 2017-07-17 16:48:21 +02:00
moxie qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
nios2 target/nios2: Fix 64-bit ilp32 compilation 2017-06-05 09:25:42 -07:00
openrisc target/openrisc: Support non-busy idle state using PMR SPR 2017-05-04 09:39:14 +09:00
ppc target/ppc: fix CPU hotplug when radix is enabled (TCG) 2017-07-17 15:07:05 +10:00
s390x s390x/kvm/migration/cpumodel: fixes, enhancements and cleanups 2017-07-14 14:19:35 +01:00
sh4 target/sh4: fix RTE instruction delay slot 2017-05-30 21:00:56 +02:00
sparc shutdown: Add source information to SHUTDOWN and RESET 2017-05-23 13:28:17 +02:00
tilegx migration: Remove unneeded includes of migration/vmstate.h 2017-06-01 18:49:22 +02:00
tricore qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
unicore32 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
xtensa char: add backend hotswap handler 2017-07-14 11:04:33 +02:00