c365e6b070
The documentation says:
ADDV Rm, Rn Rn + Rm -> Rn, overflow -> T
But QEMU implementation was:
ADDV Rm, Rn Rn + Rm -> Rm, overflow -> T
Fix by filling the correct Rm register.
Add tests provided by Paul Cercueil.
Cc: qemu-stable@nongnu.org
Fixes: ad8d25a11f ("target-sh4: implement addv and subv using TCG")
Reported-by: Paul Cercueil <paul@crapouillou.net>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2317
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20240430163125.77430-2-philmd@linaro.org>
28 lines
560 B
C
28 lines
560 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <limits.h>
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#include <stdio.h>
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#include <stdlib.h>
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static void addv(const int a, const int b, const int res, const int carry)
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{
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int o = a, c;
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asm volatile("addv %2,%0\n"
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"movt %1\n"
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: "+r"(o), "=r"(c) : "r"(b) : );
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if (c != carry || o != res) {
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printf("ADDV %d, %d = %d/%d [T = %d/%d]\n", a, b, o, res, c, carry);
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abort();
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}
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}
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int main(void)
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{
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addv(INT_MAX, 1, INT_MIN, 1);
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addv(INT_MAX - 1, 1, INT_MAX, 0);
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return 0;
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}
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