f8a4c6d728
This builds vectorised versions of sha512 to exercise the vector code: - aarch64 (AdvSimd) - i386 (SSE) - s390x (MVX) - ppc64/ppc64le (power10 vectors) Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220225172021.3493923-14-alex.bennee@linaro.org>
32 lines
811 B
Makefile
32 lines
811 B
Makefile
# -*- Mode: makefile -*-
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#
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# ppc64 specific tweaks
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VPATH += $(SRC_PATH)/tests/tcg/ppc64
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VPATH += $(SRC_PATH)/tests/tcg/ppc64le
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ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
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PPC64_TESTS=bcdsub non_signalling_xscv
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endif
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$(PPC64_TESTS): CFLAGS += -mpower8-vector
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PPC64_TESTS += mtfsf
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ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER10),)
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PPC64_TESTS += byte_reverse sha512-vector
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endif
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byte_reverse: CFLAGS += -mcpu=power10
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run-byte_reverse: QEMU_OPTS+=-cpu POWER10
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run-plugin-byte_reverse-with-%: QEMU_OPTS+=-cpu POWER10
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sha512-vector: CFLAGS +=-mcpu=power10 -O3
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sha512-vector: sha512.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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run-sha512-vector: QEMU_OPTS+=-cpu POWER10
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run-plugin-sha512-vector-with-%: QEMU_OPTS+=-cpu POWER10
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PPC64_TESTS += signal_save_restore_xer
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TESTS += $(PPC64_TESTS)
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