qemu/target/ppc/translate
Nikunj A Dadhania c5969d2eb1 target-ppc: Add xvxsigsp instruction
xvxsigsp: VSX Vector Extract Significand Single Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31 10:10:14 +11:00
..
dfp-impl.inc.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
dfp-ops.inc.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
fp-impl.inc.c target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64 2017-01-31 10:10:14 +11:00
fp-ops.inc.c target-ppc: implement stxsd and stxssp 2017-01-31 10:10:12 +11:00
spe-impl.inc.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
spe-ops.inc.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
vmx-impl.inc.c ppc: Implement bcdsr. instruction 2017-01-31 10:10:14 +11:00
vmx-ops.inc.c ppc: Implement bcdsr. instruction 2017-01-31 10:10:14 +11:00
vsx-impl.inc.c target-ppc: Add xvxsigsp instruction 2017-01-31 10:10:14 +11:00
vsx-ops.inc.c target-ppc: Add xvxsigsp instruction 2017-01-31 10:10:14 +11:00