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qemu/hw/gpio
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Victor CLEMENT 0b2ff2ceb8 pl061: fix wrong calculation of GPIOMIS register 
The masked interrupt status register should be the state of the interrupt
after masking.
There should be a logical AND instead of a logical OR between the
interrupt status and the interrupt mask.

Signed-off-by: Victor CLEMENT <victor.clement@openwide.fr>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1433154824-6927-1-git-send-email-victor.clement@openwide.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-02 14:56:25 +01:00
..
Makefile.objs PPC: Add MPC8XXX gpio controller 2014-11-04 23:26:12 +01:00
max7310.c Convert (ffs(val) - 1) to ctz32(val) 2015-04-28 15:36:08 +02:00
mpc8xxx.c PPC: Add MPC8XXX gpio controller 2014-11-04 23:26:12 +01:00
omap_gpio.c Convert ffs() != 0 callers to ctz32() 2015-04-28 15:36:08 +02:00
pl061.c pl061: fix wrong calculation of GPIOMIS register 2015-06-02 14:56:25 +01:00
puv3_gpio.c
zaurus.c Convert (ffs(val) - 1) to ctz32(val) 2015-04-28 15:36:08 +02:00