qemu/target/ppc/translate
Matheus Ferst c2aecae108 target/ppc: receive high/low as argument in get/set_cpu_vsr
Changes get_cpu_vsr to receive a new argument indicating whether the
high or low part of the register is being accessed. This change improves
consistency between the interfaces used to access Vector and VSX
registers and helps to handle endianness in some cases.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-12-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
..
dfp-impl.c.inc target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
fixedpoint-impl.c.inc target/ppc: Implement vclzdm/vctzdm instructions 2021-11-09 10:32:52 +11:00
fp-impl.c.inc target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions 2021-11-09 10:32:51 +11:00
fp-ops.c.inc target/ppc: Move load and store floating point instructions to decodetree 2021-11-09 10:32:51 +11:00
spe-impl.c.inc ppc patch queue 2020-08-18 2020-08-24 09:35:21 +01:00
spe-ops.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
vmx-impl.c.inc target/ppc: Implement Vector Extract Double to VSR using GPR index insns 2021-11-09 10:32:52 +11:00
vmx-ops.c.inc target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree 2021-11-09 10:32:52 +11:00
vsx-impl.c.inc target/ppc: receive high/low as argument in get/set_cpu_vsr 2021-11-09 10:32:52 +11:00
vsx-ops.c.inc ppc/translate: Implement lxvwsx opcode 2020-11-24 11:34:18 +11:00