958e1dd130
Many instructions which load/store 128-bit values are supposed to raise #GP when the memory operand isn't 16-byte aligned. This includes: - Instructions explicitly requiring memory alignment (Exceptions Type 1 in the "AVX and SSE Instruction Exception Specification" section of the SDM) - Legacy SSE instructions that load/store 128-bit values (Exceptions Types 2 and 4). This change sets MO_ALIGN_16 on 128-bit memory accesses that require 16-byte alignment. It adds cpu_record_sigbus and cpu_do_unaligned_access hooks that simulate a #GP exception in qemu-user and qemu-system, respectively. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/217 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ricky Zhou <ricky@rzhou.org> Message-Id: <20220830034816.57091-2-ricky@rzhou.org> [Do not bother checking PREFIX_VEX, since AVX is not supported. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
58 lines
2.0 KiB
C
58 lines
2.0 KiB
C
/*
|
|
* x86 exception helpers - user-mode specific code
|
|
*
|
|
* Copyright (c) 2003 Fabrice Bellard
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2.1 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#include "qemu/osdep.h"
|
|
#include "cpu.h"
|
|
#include "exec/exec-all.h"
|
|
#include "tcg/helper-tcg.h"
|
|
|
|
void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
|
|
MMUAccessType access_type,
|
|
bool maperr, uintptr_t ra)
|
|
{
|
|
X86CPU *cpu = X86_CPU(cs);
|
|
CPUX86State *env = &cpu->env;
|
|
|
|
/*
|
|
* The error_code that hw reports as part of the exception frame
|
|
* is copied to linux sigcontext.err. The exception_index is
|
|
* copied to linux sigcontext.trapno. Short of inventing a new
|
|
* place to store the trapno, we cannot let our caller raise the
|
|
* signal and set exception_index to EXCP_INTERRUPT.
|
|
*/
|
|
env->cr[2] = addr;
|
|
env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)
|
|
| (maperr ? 0 : PG_ERROR_P_MASK)
|
|
| PG_ERROR_U_MASK;
|
|
cs->exception_index = EXCP0E_PAGE;
|
|
|
|
/* Disable do_interrupt_user. */
|
|
env->exception_is_int = 0;
|
|
env->exception_next_eip = -1;
|
|
|
|
cpu_loop_exit_restore(cs, ra);
|
|
}
|
|
|
|
void x86_cpu_record_sigbus(CPUState *cs, vaddr addr,
|
|
MMUAccessType access_type, uintptr_t ra)
|
|
{
|
|
X86CPU *cpu = X86_CPU(cs);
|
|
handle_unaligned_access(&cpu->env, addr, access_type, ra);
|
|
}
|