qemu/target
Joel Sing c13b169f1a
RISC-V: Clear load reservations on context switch and SC
This prevents a load reservation from being placed in one context/process,
then being used in another, resulting in an SC succeeding incorrectly and
breaking atomics.

Signed-off-by: Joel Sing <joel@sing.id.au>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-25 22:37:04 -07:00
..
alpha Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
arm KVM: Introduce kvm_arch_destroy_vcpu() 2019-06-21 02:29:39 +02:00
cris Supply missing header guards 2019-06-12 13:20:21 +02:00
hppa Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
i386 target/i386: kvm: Add nested migration blocker only when kernel lacks required capabilities 2019-06-21 13:25:28 +02:00
lm32 Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
m68k Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
microblaze Supply missing header guards 2019-06-12 13:20:21 +02:00
mips MIPS queue for June 21st, 2019 2019-06-21 15:40:50 +01:00
moxie Supply missing header guards 2019-06-12 13:20:21 +02:00
nios2 Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
openrisc Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
ppc KVM: Introduce kvm_arch_destroy_vcpu() 2019-06-21 02:29:39 +02:00
riscv RISC-V: Clear load reservations on context switch and SC 2019-06-25 22:37:04 -07:00
s390x KVM: Introduce kvm_arch_destroy_vcpu() 2019-06-21 02:29:39 +02:00
sh4 Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
sparc Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
tilegx Normalize position of header guard 2019-06-12 13:20:20 +02:00
tricore Supply missing header guards 2019-06-12 13:20:21 +02:00
unicore32 Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
xtensa Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00