Richard Henderson 597f9b2d30 accel/tcg: Pass max_insn to gen_intermediate_code by pointer ... In preparation for returning the number of insns generated via the same pointer. Adjust only the prototypes so far. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2023-03-01 07:33:27 -10:00
..
cpu-param.h	Normalize header guard symbol definition	2022-05-11 16:50:26 +02:00
cpu-qom.h	target/tricore: Convert to 3-phase reset	2022-12-16 15:58:16 +00:00
cpu.c	target/tricore: Replace tb_pc() with tb->pc	2023-03-01 07:33:05 -10:00
cpu.h	target/tricore: Remove unused fields from CPUTriCoreState	2023-02-27 22:29:01 +01:00
csfr.h.inc	target/tricore: Rename csfr.def -> csfr.h.inc	2022-11-05 20:35:45 +01:00
fpu_helper.c	tricore: add QSEED instruction	2019-06-25 15:02:07 +02:00
gdbstub.c	target/tricore: Fix gdbstub write to address registers	2022-12-18 09:39:17 -08:00
helper.c	bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx	2023-01-18 11:14:34 +01:00
helper.h	target/tricore: Drop check for singlestep_enabled	2021-10-15 16:39:14 -07:00
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
meson.build	meson: target	2020-08-21 06:30:35 -04:00
op_helper.c	accel/tcg: Remove will_exit argument from cpu_restore_state	2022-11-01 08:31:41 +11:00
translate.c	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
tricore-defs.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 07:03:34 -07:00
tricore-opcodes.h	Supply missing header guards	2019-06-12 13:20:21 +02:00