qemu/target/avr
Lucas Dietrich fc97167f1f target/avr: Fix handling of interrupts above 33.
This commit addresses a bug in the AVR interrupt handling code.
The modification involves replacing the usage of the ctz32 function
with ctz64 to ensure proper handling of interrupts above 33 in the AVR
target.

Previously, timers 3, 4, and 5 interrupts were not functioning correctly
because most of their interrupt vectors are numbered above 33.

Signed-off-by: Lucas Dietrich <ld.adecy@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
(Mjt: updated subject line to have subsytem prefix)
2023-07-08 07:24:38 +03:00
..
cpu-param.h target/avr: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
cpu-qom.h target/avr: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/*: Add missing includes of tcg/debug-assert.h 2023-06-05 12:04:28 -07:00
cpu.h target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
disas.c
gdbstub.c gdbstub: move register helpers into standalone include 2023-03-07 20:44:08 +00:00
helper.c target/avr: Fix handling of interrupts above 33. 2023-07-08 07:24:38 +03:00
helper.h target/avr: Mark some helpers noreturn 2021-07-09 09:42:28 -07:00
insn.decode
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c cpu: Move AVR target vmsd field from CPUClass to DeviceClass 2021-05-26 15:33:59 -07:00
meson.build meson: Replace softmmu_ss -> system_ss 2023-06-20 10:01:30 +02:00
translate.c accel/tcg: Introduce translator_io_start 2023-06-05 12:04:29 -07:00