Aurelien Jarno c0080f1bdb target/s390x: check alignment in CDSG in the !CONFIG_ATOMIC128 case ...

The CDSG instruction requires a 16-byte alignement, as expressed in
the MO_ALIGN_16 passed to helper_atomic_cmpxchgo_be_mmu. In the non
parallel case, use check_alignment to enforce this.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <20170604202034.16615-4-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>

2017-06-06 15:25:14 -07:00

..

arch_dump.c

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cc_helper.c

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cpu_features_def.h

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cpu_features.c

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cpu_features.h

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cpu_models.c

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cpu_models.h

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cpu-qom.h

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cpu.c

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cpu.h

target/s390x: remove some Linux assumptions from IPTE

2017-06-06 14:34:32 -07:00

fpu_helper.c

target/s390x: implement COMPARE AND SIGNAL

2017-06-06 15:20:38 -07:00

gdbstub.c

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gen-features.c

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helper.c

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helper.h

target/s390x: implement STORE PAIR TO QUADWORD

2017-06-06 15:25:14 -07:00

insn-data.def

target/s390x: implement STORE PAIR TO QUADWORD

2017-06-06 15:25:14 -07:00

insn-format.def

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int_helper.c

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interrupt.c

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ioinst.c

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kvm.c

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machine.c

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Makefile.objs

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mem_helper.c

target/s390x: check alignment in CDSG in the !CONFIG_ATOMIC128 case

2017-06-06 15:25:14 -07:00

misc_helper.c

target/s390x: implement COMPARE LOGICAL LONG UNICODE

2017-06-06 15:20:43 -07:00

mmu_helper.c

target/s390x: remove some Linux assumptions from IPTE

2017-06-06 14:34:32 -07:00

trace-events

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translate.c

target/s390x: implement STORE PAIR TO QUADWORD

2017-06-06 15:25:14 -07:00