bf1fa6912d
The register request via gdbstub would return the SR part which contains the Trace/Master/IRQ state flags, but would be missing the CR (Condition Register) state bits. This fix adds this support by merging them in the m68k specific gdbstub handler m68k_cpu_gdb_read_register for SR register. Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190609105154.GA16755@localhost.localdomain> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
77 lines
2.1 KiB
C
77 lines
2.1 KiB
C
/*
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* m68k gdb server stub
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2013 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/gdbstub.h"
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int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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CPUM68KState *env = &cpu->env;
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if (n < 8) {
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/* D0-D7 */
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return gdb_get_reg32(mem_buf, env->dregs[n]);
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} else if (n < 16) {
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/* A0-A7 */
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return gdb_get_reg32(mem_buf, env->aregs[n - 8]);
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} else {
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switch (n) {
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case 16:
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/* SR is made of SR+CCR, CCR is many 1bit flags so uses helper */
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return gdb_get_reg32(mem_buf, env->sr | cpu_m68k_get_ccr(env));
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case 17:
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return gdb_get_reg32(mem_buf, env->pc);
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}
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}
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/* FP registers not included here because they vary between
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ColdFire and m68k. Use XML bits for these. */
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return 0;
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}
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int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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CPUM68KState *env = &cpu->env;
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uint32_t tmp;
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tmp = ldl_p(mem_buf);
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if (n < 8) {
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/* D0-D7 */
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env->dregs[n] = tmp;
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} else if (n < 16) {
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/* A0-A7 */
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env->aregs[n - 8] = tmp;
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} else {
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switch (n) {
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case 16:
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cpu_m68k_set_sr(env, tmp);
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break;
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case 17:
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env->pc = tmp;
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break;
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default:
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return 0;
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}
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}
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return 4;
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}
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