qemu/include/hw/i386
Tiejun Chen bd8107d730 igd gfx passthrough: create a isa bridge
Currently IGD drivers always need to access PCH by 1f.0. But we
don't want to poke that directly to get ID, and although in real
world different GPU should have different PCH. But actually the
different PCH DIDs likely map to different PCH SKUs. We do the
same thing for the GPU. For PCH, the different SKUs are going to
be all the same silicon design and implementation, just different
features turn on and off with fuses. The SW interfaces should be
consistent across all SKUs in a given family (eg LPT). But just
same features may not be supported.

Most of these different PCH features probably don't matter to the
Gfx driver, but obviously any difference in display port connections
will so it should be fine with any PCH in case of passthrough.

So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
scenarios, 0x9cc3 for BDW(Broadwell).

Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
2015-09-10 12:04:28 +00:00
..
apic_internal.h apic_internal.h: Include cpu.h directly 2015-08-19 16:29:53 +01:00
apic-msidef.h hw: move headers to include/ 2013-04-08 18:13:10 +02:00
apic.h target-i386: clear bsp bit when designating bsp 2015-04-02 15:57:27 +02:00
ich9.h ich9: implement strap SPKR pin logic 2015-07-08 10:09:55 +03:00
intel_iommu.h intel_iommu: fix VTD_SID_TO_BUS 2014-11-02 12:03:04 +02:00
ioapic_internal.h ioapic: QOM'ify ioapic 2013-12-24 18:02:18 +01:00
ioapic.h pc: move IO_APIC_DEFAULT_ADDRESS to include/hw/i386/ioapic.h 2013-07-29 19:33:32 -05:00
pc.h igd gfx passthrough: create a isa bridge 2015-09-10 12:04:28 +00:00
topology.h target-i386: Move topology.h to include/hw/i386 2015-03-09 16:30:02 -03:00