Richard Henderson bc7edccae0 target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn ... It is confusing to have different exits from translation for various conditions in separate functions. Merge disas_a64_insn into its only caller. Standardize on the "s" name for the DisasContext, as the code from disas_a64_insn had more instances. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210821195958.41312-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2021-09-13 21:01:08 +01:00
..
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
cpu64.c	target-arm: Add support for Fujitsu A64FX	2021-09-01 11:08:18 +01:00
cpu_tcg.c	target/arm: Enable MVE in Cortex-M55	2021-09-01 11:08:18 +01:00
cpu-param.h
cpu-qom.h
cpu.c	target/arm: Avoid assertion trying to use KVM and multiple ASes	2021-08-26 17:02:01 +01:00
cpu.h	target/arm: Take an exception if PSTATE.IL is set	2021-09-13 21:01:08 +01:00
crypto_helper.c
debug_helper.c	accel/tcg: Remove TranslatorOps.breakpoint_check	2021-07-21 07:47:05 -10:00
gdbstub64.c
gdbstub.c	target/arm: Enforce that M-profile SP low 2 bits are always zero	2021-07-27 10:57:39 +01:00
helper-a64.c	target/arm: Take an exception if PSTATE.IL is set	2021-09-13 21:01:08 +01:00
helper-a64.h
helper-mve.h	target/arm: Implement MVE VRINT insns	2021-09-01 11:08:17 +01:00
helper-sve.h
helper.c	target/arm: Take an exception if PSTATE.IL is set	2021-09-13 21:01:08 +01:00
helper.h	target/arm: Implement HSTR.TJDBX	2021-08-26 17:02:01 +01:00
idau.h
internals.h	target/arm: Export aarch64_sve_zcr_get_valid_len	2021-07-27 10:57:40 +01:00
iwmmxt_helper.c
Kconfig
kvm64.c	target/arm/kvm64: Ensure sve vls map is completely clear	2021-08-26 17:01:59 +01:00
kvm_arm.h	hw/arm/virt: add ITS support in virt GIC	2021-09-13 21:01:08 +01:00
kvm-consts.h
kvm-stub.c
kvm.c	hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM	2021-09-13 16:07:22 +01:00
m_helper.c	target/arm: Implement M-profile trapping on division by zero	2021-08-25 10:48:50 +01:00
m-nocp.decode
machine.c
meson.build
monitor.c
mte_helper.c
mve_helper.c	target/arm: Implement MVE VRINT insns	2021-09-01 11:08:17 +01:00
mve.decode	target/arm: Implement MVE VRINT insns	2021-09-01 11:08:17 +01:00
neon_helper.c
neon-dp.decode
neon-ls.decode
neon-shared.decode
op_addsub.h
op_helper.c	target/arm: Implement HSTR.TJDBX	2021-08-26 17:02:01 +01:00
pauth_helper.c
psci.c
sve_helper.c
sve.decode
syndrome.h	target/arm: Take an exception if PSTATE.IL is set	2021-09-13 21:01:08 +01:00
t16.decode
t32.decode	target/arm: Implement MVE VCTP	2021-08-25 10:48:50 +01:00
tlb_helper.c
trace-events
trace.h
translate-a32.h	target/arm: Implement MVE VCTP	2021-08-25 10:48:50 +01:00
translate-a64.c	target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn	2021-09-13 21:01:08 +01:00
translate-a64.h
translate-m-nocp.c
translate-mve.c	target/arm: Implement MVE VRINT insns	2021-09-01 11:08:17 +01:00
translate-neon.c	target/arm: Implement MVE VADD (floating-point)	2021-09-01 11:08:16 +01:00
translate-sve.c
translate-vfp.c	target/arm: Implement MVE VMOV to/from 2 general-purpose registers	2021-08-25 10:48:50 +01:00
translate.c	target/arm: Take an exception if PSTATE.IL is set	2021-09-13 21:01:08 +01:00
translate.h	target/arm: Take an exception if PSTATE.IL is set	2021-09-13 21:01:08 +01:00
vec_helper.c	target/arm: Implement MVE VMULL (polynomial)	2021-08-25 10:48:49 +01:00
vec_internal.h	target/arm: Implement MVE VMULL (polynomial)	2021-08-25 10:48:49 +01:00
vfp_helper.c
vfp-uncond.decode
vfp.decode