Simon Guo 21b786f607 PowerPC: Add TS bits into msr_mask ... During migration, after MSR bits is synced, cpu_post_load() will use msr_mask to determine which PPC MSR bits will be applied into the target side. Hardware Transaction Memory(HTM) has been supported since Power8, but TS0/TS1 bit was not in msr_mask yet. That will prevent target KVM from loading TM checkpointed values. This patch adds TS bits into msr_mask for Power8, so that transactional application can be migrated across qemu. Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2018-03-06 13:16:29 +11:00
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arch_dump.c
compat.c
cpu-models.c
cpu-models.h
cpu-qom.h
cpu.c
cpu.h
dfp_helper.c
excp_helper.c
fpu_helper.c
gdbstub.c
helper_regs.h
helper.h
int_helper.c
internal.h
kvm_ppc.h
kvm-stub.c
kvm.c
machine.c
Makefile.objs
mem_helper.c
mfrom_table_gen.c
mfrom_table.c
misc_helper.c
mmu_helper.c
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c
mmu-hash64.h
mmu-radix64.c
mmu-radix64.h
monitor.c
timebase_helper.c
trace-events
translate_init.c	PowerPC: Add TS bits into msr_mask	2018-03-06 13:16:29 +11:00
translate.c
user_only_helper.c