5857974d5d
This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generation strategy is similar to the STM ADC already in the tree. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [clg : support for multiple engines (AST2600) ] Signed-off-by: Cédric Le Goater <clg@kaod.org> [pdel : refactored engine register struct fields to regs[] array field] [pdel : added guest-error checking for upper-8 channel regs in AST2600] [pdel : allow 16-bit reads of the channel data registers] Signed-off-by: Peter Delevoryas <pdel@fb.com> Message-Id: <20211005052604.1674891-2-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
56 lines
1.2 KiB
C
56 lines
1.2 KiB
C
/*
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* Aspeed ADC
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*
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* Copyright 2017-2021 IBM Corp.
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*
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* Andrew Jeffery <andrew@aj.id.au>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_ADC_ASPEED_ADC_H
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#define HW_ADC_ASPEED_ADC_H
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#include "hw/sysbus.h"
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#define TYPE_ASPEED_ADC "aspeed.adc"
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#define TYPE_ASPEED_2400_ADC TYPE_ASPEED_ADC "-ast2400"
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#define TYPE_ASPEED_2500_ADC TYPE_ASPEED_ADC "-ast2500"
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#define TYPE_ASPEED_2600_ADC TYPE_ASPEED_ADC "-ast2600"
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OBJECT_DECLARE_TYPE(AspeedADCState, AspeedADCClass, ASPEED_ADC)
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#define TYPE_ASPEED_ADC_ENGINE "aspeed.adc.engine"
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OBJECT_DECLARE_SIMPLE_TYPE(AspeedADCEngineState, ASPEED_ADC_ENGINE)
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#define ASPEED_ADC_NR_CHANNELS 16
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#define ASPEED_ADC_NR_REGS (0xD0 >> 2)
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struct AspeedADCEngineState {
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/* <private> */
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SysBusDevice parent;
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MemoryRegion mmio;
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qemu_irq irq;
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uint32_t engine_id;
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uint32_t nr_channels;
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uint32_t regs[ASPEED_ADC_NR_REGS];
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};
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struct AspeedADCState {
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/* <private> */
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SysBusDevice parent;
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MemoryRegion mmio;
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qemu_irq irq;
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AspeedADCEngineState engines[2];
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};
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struct AspeedADCClass {
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SysBusDeviceClass parent_class;
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uint32_t nr_engines;
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};
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#endif /* HW_ADC_ASPEED_ADC_H */
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