ba1ba5cca3
there are 2 use cases to deal with:
1: fixed CPU models per board/soc
2: boards with user configurable cpu_model and fallback to
default cpu_model if user hasn't specified one explicitly
For the 1st
drop intermediate cpu_model parsing and use const cpu type
directly, which replaces:
typename = object_class_get_name(
cpu_class_by_name(TYPE_ARM_CPU, cpu_model))
object_new(typename)
with
object_new(FOO_CPU_TYPE_NAME)
or
cpu_generic_init(BASE_CPU_TYPE, "my cpu model")
with
cpu_create(FOO_CPU_TYPE_NAME)
as result 1st use case doesn't have to invoke not necessary
translation and not needed code is removed.
For the 2nd
1: set default cpu type with MachineClass::default_cpu_type and
2: use generic cpu_model parsing that done before machine_init()
is run and:
2.1: drop custom cpu_model parsing where pattern is:
typename = object_class_get_name(
cpu_class_by_name(TYPE_ARM_CPU, cpu_model))
[parse_features(typename, cpu_model, &err) ]
2.2: or replace cpu_generic_init() which does what
2.1 does + create_cpu(typename) with just
create_cpu(machine->cpu_type)
as result cpu_name -> cpu_type translation is done using
generic machine code one including parsing optional features
if supported/present (removes a bunch of duplicated cpu_model
parsing code) and default cpu type is defined in an uniform way
within machine_class_init callbacks instead of adhoc places
in boadr's machine_init code.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <1505318697-77161-6-git-send-email-imammedo@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/*
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* ARMv7M CPU object
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*
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* Copyright (c) 2017 Linaro Ltd
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* Written by Peter Maydell <peter.maydell@linaro.org>
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*
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* This code is licensed under the GPL version 2 or later.
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*/
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#ifndef HW_ARM_ARMV7M_H
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#define HW_ARM_ARMV7M_H
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#include "hw/sysbus.h"
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#include "hw/intc/armv7m_nvic.h"
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#define TYPE_BITBAND "ARM,bitband-memory"
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#define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND)
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typedef struct {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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AddressSpace *source_as;
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MemoryRegion iomem;
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uint32_t base;
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MemoryRegion *source_memory;
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} BitBandState;
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#define TYPE_ARMV7M "armv7m"
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#define ARMV7M(obj) OBJECT_CHECK(ARMv7MState, (obj), TYPE_ARMV7M)
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#define ARMV7M_NUM_BITBANDS 2
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/* ARMv7M container object.
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* + Unnamed GPIO input lines: external IRQ lines for the NVIC
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* + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ
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* + Property "cpu-type": CPU type to instantiate
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* + Property "num-irq": number of external IRQ lines
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* + Property "memory": MemoryRegion defining the physical address space
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* that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
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* devices will be automatically layered on top of this view.)
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*/
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typedef struct ARMv7MState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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NVICState nvic;
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BitBandState bitband[ARMV7M_NUM_BITBANDS];
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ARMCPU *cpu;
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/* MemoryRegion we pass to the CPU, with our devices layered on
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* top of the ones the board provides in board_memory.
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*/
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MemoryRegion container;
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/* Properties */
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char *cpu_type;
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/* MemoryRegion the board provides to us (with its devices, RAM, etc) */
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MemoryRegion *board_memory;
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} ARMv7MState;
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#endif
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