qemu/hw/ssi
Cédric Le Goater f286f04c21 aspeed/smc: Add AST2600 timings registers
Each CS has its own Read Timing Compensation Register on newer SoCs.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20191119141211.25716-13-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-12-16 10:46:34 +00:00
..
aspeed_smc.c aspeed/smc: Add AST2600 timings registers 2019-12-16 10:46:34 +00:00
imx_spi.c
Kconfig
Makefile.objs
mss-spi.c
omap_spi.c
pl022.c
ssi.c
stm32f2xx_spi.c
xilinx_spi.c
xilinx_spips.c ssi: xilinx_spips: Skip spi bus update for a few register writes 2019-11-19 13:20:27 +00:00