qemu/target
Peter Maydell e0d79c9435 * VMX feature fix (myself)
* HVF fixes (Cameron)
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl3c6UMUHHBib256aW5p
 QHJlZGhhdC5jb20ACgkQv/vSX3jHroNPxgf9FteAWW0LfRiCa1Rw4iujvqwiNLiM
 VrxlSqmQ65n+0Ao2CA6/qJ4KqDQMDZKmDIX4PHi39BtkWskIDbl6fl4Gwbxw7FYu
 7VbmCNnFB+/osz/w4n5jHkomlGJJSj32qWh830GIF5a0+F8Mey9KZl2PHLespLeB
 Dmbge8cYP3am96gzLXEgB+FvpdUjYWaSgynjmhl4p3tv3xDzTJSG6E53Ksd4wiSX
 4u5plnVjdVZqKdcKrU+9c1h65jlwheHGBr5q7paUuZ93h6/eAdC9h8Nimn5I2/9Z
 fy6FHFCYTvCWQnFFHxvrlesxJRGFmKS0LXNOcM8zUdsx/Mr6Hk8HGITyrQ==
 =fulk
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* VMX feature fix (myself)
* HVF fixes (Cameron)

# gpg: Signature made Tue 26 Nov 2019 08:58:43 GMT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  hvf: more accurately match SDM when setting CR0 and PDPTE registers
  hvf: correctly handle REX prefix in relation to legacy prefixes
  hvf: remove TSC synchronization code because it isn't fully complete
  hvf: non-RAM, non-ROMD memory ranges are now correctly mapped in
  target/i386: add two missing VMX features for Skylake and CascadeLake Server

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-26 19:48:01 +00:00
..
alpha target/alpha: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
arm target/arm: Honor HCR_EL2.TID3 trapping requirements 2019-11-26 13:55:37 +00:00
cris cputlb: ensure _cmmu helper functions follow the naming standard 2019-10-28 15:12:38 +00:00
hppa target/hppa: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
i386 hvf: more accurately match SDM when setting CR0 and PDPTE registers 2019-11-26 09:58:37 +01:00
lm32 Monitor patches for 2019-08-21 2019-08-22 10:31:21 +01:00
m68k target/m68k: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
microblaze target/microblaze: Plug temp leak around eval_cond_jmp() 2019-11-12 16:35:26 +01:00
mips target/mips: Refactor handling of vector compare 'less than' (signed) instructions 2019-10-25 18:37:01 +02:00
moxie hw/core: Move cpu.c, cpu.h from qom/ to hw/core/ 2019-08-21 13:24:01 +02:00
nios2 Monitor patches for 2019-08-21 2019-08-22 10:31:21 +01:00
openrisc target/openrisc: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
ppc spapr/kvm: Set default cpu model for all machine classes 2019-11-18 11:50:39 +01:00
riscv target/riscv: Remove atomic accesses to MIP CSR 2019-11-14 09:53:28 -08:00
s390x s390x/kvm: Set default cpu model for all machine classes 2019-10-21 18:03:08 +02:00
sh4 target/sh4: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
sparc target/sparc: Define an enumeration for accessing env->regwptr 2019-11-06 13:35:25 +01:00
tilegx tcg: TCGMemOp is now accelerator independent MemOp 2019-09-03 08:30:38 -07:00
tricore tcg: TCGMemOp is now accelerator independent MemOp 2019-09-03 08:30:38 -07:00
unicore32 Monitor patches for 2019-08-21 2019-08-22 10:31:21 +01:00
xtensa target/xtensa: fetch code with translator_ld 2019-10-28 15:12:38 +00:00