2b3a98255c
xlnx_dp_read allows an out-of-bounds read at its default branch because of an improper index. According to https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html (DP Module), registers 0x3A4/0x3A4/0x3AC are allowed. DP_INT_MASK 0x000003A4 32 mixed 0xFFFFF03F Interrupt Mask Register for intrN. DP_INT_EN 0x000003A8 32 mixed 0x00000000 Interrupt Enable Register. DP_INT_DS 0x000003AC 32 mixed 0x00000000 Interrupt Disable Register. In xlnx_dp_write, when the offset is 0x3A8 and 0x3AC, the virtual device will write s->core_registers[0x3A4 >> 2]. That is to say, the maxize of s->core_registers could be ((0x3A4 >> 2) + 1). However, the current size of s->core_registers is (0x3AF >> >> 2), that is ((0x3A4 >> 2) + 2), which is out of the range. In xlxn_dp_read, the access to offset 0x3A8 or 0x3AC will be directed to the offset 0x3A8 (incorrect functionality) or 0x3AC (out-of-bounds read) rather than 0x3A4. This patch enforces the read access to offset 0x3A8 and 0x3AC to 0x3A4, but does not adjust the size of s->core_registers to avoid breaking migration. Fixes: 58ac482a66de ("introduce xlnx-dp") Signed-off-by: Qiang Liu <cyruscyliu@gmail.com> Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <1628059910-12060-1-git-send-email-cyruscyliu@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
34 lines
727 B
C
34 lines
727 B
C
/*
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* QTest fuzzer-generated testcase for xlnx-dp display device
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*
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* Copyright (c) 2021 Qiang Liu <cyruscyliu@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "libqos/libqtest.h"
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/*
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* This used to trigger the out-of-bounds read in xlnx_dp_read
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*/
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static void test_fuzz_xlnx_dp_0x3ac(void)
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{
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QTestState *s = qtest_init("-M xlnx-zcu102 -display none ");
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qtest_readl(s, 0xfd4a03ac);
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qtest_quit(s);
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}
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int main(int argc, char **argv)
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{
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const char *arch = qtest_get_arch();
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g_test_init(&argc, &argv, NULL);
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if (strcmp(arch, "aarch64") == 0) {
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qtest_add_func("fuzz/test_fuzz_xlnx_dp/3ac", test_fuzz_xlnx_dp_0x3ac);
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}
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return g_test_run();
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}
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