qemu/hw/riscv
Zhao Liu a916dc954b hw/riscv: Fix typo field in error_report
"smp.cpus" means the number of online CPUs and "smp.max_cpus" means the
total number of CPUs.

riscv_numa_get_default_cpu_node_id() checks "smp.cpus" and the
"available CPUs" description in the next error message also indicates
online CPUs.

So report "smp.cpus" in error_report() instand of "smp.max_cpus".

Since "smp.cpus" is "unsigned int", use "%u".

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230718080712.503333-1-zhao1.liu@linux.intel.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-07-19 14:31:41 +10:00
..
boot.c hw/riscv/boot.c: make riscv_load_initrd() static 2023-02-16 07:55:37 -08:00
Kconfig hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b. 2023-07-10 22:29:15 +10:00
meson.build hw/riscv/virt: Enable basic ACPI infrastructure 2023-03-06 11:35:04 -08:00
microchip_pfsoc.c hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel() 2023-02-16 07:55:30 -08:00
numa.c hw/riscv: Fix typo field in error_report 2023-07-19 14:31:41 +10:00
opentitan.c hw/riscv/opentitan: Correct OpenTitanState parent type/size 2023-06-13 17:19:42 +10:00
riscv_hart.c
shakti_c.c *: Add missing includes of qemu/error-report.h 2023-03-22 15:06:57 +00:00
sifive_e.c hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b. 2023-07-10 22:29:15 +10:00
sifive_u.c hw/riscv: Move the dtb load bits outside of create_fdt() 2023-03-01 17:19:14 -08:00
spike.c hw/riscv: Validate cluster and NUMA node boundary 2023-06-26 10:23:01 +02:00
virt-acpi-build.c *: Add missing includes of qemu/error-report.h 2023-03-22 15:06:57 +00:00
virt.c hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set 2023-07-10 22:29:15 +10:00