70e89132c9
Adds the "virtio,pci-iommu" node in the host bridge node and the RID mapping, excluding the IOMMU RID. This is done in the virtio-iommu-pci hotplug handler which gets called only if no firmware is loaded or if -no-acpi is passed on the command line. As non DT integration is not yet supported by the kernel we must make sure we are in DT mode. This limitation will be removed as soon as the topology description feature gets supported. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20200214132745.23392-10-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
171 lines
4.6 KiB
C
171 lines
4.6 KiB
C
/*
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*
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* Copyright (c) 2015 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Emulate a virtual board which works by passing Linux all the information
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* it needs about what devices are present via the device tree.
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* There are some restrictions about what we can do here:
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* + we can only present devices whose Linux drivers will work based
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* purely on the device tree with no platform data at all
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* + we want to present a very stripped-down minimalist platform,
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* both because this reduces the security attack surface from the guest
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* and also because it reduces our exposure to being broken when
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* the kernel updates its device tree bindings and requires further
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* information in a device binding that we aren't providing.
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* This is essentially the same approach kvmtool uses.
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*/
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#ifndef QEMU_ARM_VIRT_H
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#define QEMU_ARM_VIRT_H
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#include "exec/hwaddr.h"
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#include "qemu/notify.h"
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#include "hw/boards.h"
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#include "hw/arm/boot.h"
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#include "hw/block/flash.h"
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#include "sysemu/kvm.h"
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#include "hw/intc/arm_gicv3_common.h"
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#define NUM_GICV2M_SPIS 64
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#define NUM_VIRTIO_TRANSPORTS 32
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#define NUM_SMMU_IRQS 4
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#define ARCH_GIC_MAINT_IRQ 9
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#define ARCH_TIMER_VIRT_IRQ 11
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#define ARCH_TIMER_S_EL1_IRQ 13
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#define ARCH_TIMER_NS_EL1_IRQ 14
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#define ARCH_TIMER_NS_EL2_IRQ 10
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#define VIRTUAL_PMU_IRQ 7
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#define PPI(irq) ((irq) + 16)
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enum {
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VIRT_FLASH,
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VIRT_MEM,
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VIRT_CPUPERIPHS,
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VIRT_GIC_DIST,
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VIRT_GIC_CPU,
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VIRT_GIC_V2M,
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VIRT_GIC_HYP,
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VIRT_GIC_VCPU,
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VIRT_GIC_ITS,
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VIRT_GIC_REDIST,
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VIRT_SMMU,
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VIRT_UART,
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VIRT_MMIO,
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VIRT_RTC,
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VIRT_FW_CFG,
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VIRT_PCIE,
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VIRT_PCIE_MMIO,
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VIRT_PCIE_PIO,
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VIRT_PCIE_ECAM,
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VIRT_PLATFORM_BUS,
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VIRT_GPIO,
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VIRT_SECURE_UART,
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VIRT_SECURE_MEM,
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VIRT_PCDIMM_ACPI,
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VIRT_ACPI_GED,
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VIRT_LOWMEMMAP_LAST,
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};
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/* indices of IO regions located after the RAM */
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enum {
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VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST,
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VIRT_HIGH_PCIE_ECAM,
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VIRT_HIGH_PCIE_MMIO,
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};
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typedef enum VirtIOMMUType {
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VIRT_IOMMU_NONE,
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VIRT_IOMMU_SMMUV3,
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VIRT_IOMMU_VIRTIO,
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} VirtIOMMUType;
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typedef struct MemMapEntry {
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hwaddr base;
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hwaddr size;
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} MemMapEntry;
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typedef struct {
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MachineClass parent;
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bool disallow_affinity_adjustment;
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bool no_its;
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bool no_pmu;
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bool claim_edge_triggered_timers;
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bool smbios_old_sys_ver;
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bool no_highmem_ecam;
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bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */
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bool kvm_no_adjvtime;
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} VirtMachineClass;
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typedef struct {
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MachineState parent;
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Notifier machine_done;
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DeviceState *platform_bus_dev;
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FWCfgState *fw_cfg;
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PFlashCFI01 *flash[2];
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bool secure;
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bool highmem;
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bool highmem_ecam;
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bool its;
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bool virt;
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int32_t gic_version;
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VirtIOMMUType iommu;
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uint16_t virtio_iommu_bdf;
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struct arm_boot_info bootinfo;
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MemMapEntry *memmap;
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char *pciehb_nodename;
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const int *irqmap;
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int smp_cpus;
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void *fdt;
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int fdt_size;
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uint32_t clock_phandle;
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uint32_t gic_phandle;
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uint32_t msi_phandle;
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uint32_t iommu_phandle;
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int psci_conduit;
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hwaddr highest_gpa;
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DeviceState *gic;
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DeviceState *acpi_dev;
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Notifier powerdown_notifier;
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} VirtMachineState;
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#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
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#define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
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#define VIRT_MACHINE(obj) \
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OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE)
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#define VIRT_MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE)
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#define VIRT_MACHINE_CLASS(klass) \
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OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE)
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void virt_acpi_setup(VirtMachineState *vms);
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/* Return the number of used redistributor regions */
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static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
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{
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uint32_t redist0_capacity =
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vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
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assert(vms->gic_version == 3);
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return vms->smp_cpus > redist0_capacity ? 2 : 1;
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}
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#endif /* QEMU_ARM_VIRT_H */
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